MC68HC908KX2 MOTOROLA [Motorola, Inc], MC68HC908KX2 Datasheet - Page 138
MC68HC908KX2
Manufacturer Part Number
MC68HC908KX2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908KX2.pdf
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Low-Voltage Inhibit (LVI)
8.3 Features
8.4 Functional Description
Technical Data
138
NOTE:
Features of the LVI module include:
Figure 8-1
LVI5OR3, and LVIRSTD are user selectable options found in the
configuration register (CONFIG1). See
Register
The LVI is enabled out of reset. The LVI module contains a bandgap
reference circuit and comparator. Clearing the LVI power disable bit,
LVIPWRD, enables the LVI to monitor V
reset disable bit, LVIRSTD, enables the LVI module to generate a reset
when V
mode bit, LVISTOP, enables the LVI to operate in stop mode. Setting the
LVI 5-V or 3-V trip point bit, LVI5OR3, enables the trip point voltage,
V
enables the trip point voltage, V
The actual trip thresholds are specified in
Characteristics
After a power-on reset, the LVI’s default mode of operation is 3 volts. If
a 5-V system is used, the user must set the LVI5OR3 bit to raise the trip
point to 5-V operation.
If the user requires 5-V mode and sets the LVI5OR3 bit after power-on
reset while the V
will immediately go into reset. The next time the LVI releases the reset,
the supply will be above the V
TRIPF
•
•
•
•
, to be configured for 5-V operation. Clearing the LVI5OR3 bit
Programmable LVI reset
Programmable power consumption
Selectable LVI trip voltage
Programmable stop mode operation
DD
(CONFIG).
falls below a voltage, V
shows the structure of the LVI module. LVISTOP, LVIPWRD,
Low-Voltage Inhibit (LVI)
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
DD
and
supply is not above the V
20.7 3.0-Vdc DC Electrical
TRIPR
TRIPF
TRIPF
for 5-V mode.
, to be configured for 3-V operation.
. Setting the LVI enable in stop
Section 9. Configuration
DD
20.6 5.0-Vdc DC Electrical
voltage. Clearing the LVI
TRIPR
for 5-V mode, the MCU
Characteristics.
MOTOROLA
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