MC68HC908KX2 MOTOROLA [Motorola, Inc], MC68HC908KX2 Datasheet - Page 266

• Manufacturer Part Number: MC68HC908KX2
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Monitor ROM (MON)
18.11 Security
Technical Data
266
NOTE:
The MCU executes the SWI and PSHH instructions when it enters
monitor mode. The RUN command tells the MCU to execute the PULH
and RTI instructions. Before sending the RUN command, the host can
modify the stacked CPU registers to prepare to run the host program.
The READSP command returns the incremented stack pointer value,
SP + 1. The high and low bytes of the program counter are at addresses
SP + 5 and SP + 6.
A security feature discourages unauthorized reading of FLASH locations
while in monitor mode. The host can bypass the security feature at
monitor mode entry by sending eight security bytes that match the bytes
at locations $FFF6–$FFFD. Locations $FFF6–$FFFD contain user-
defined data.
Do not leave locations $FFF6–$FFFD blank. For security reasons,
program locations $FFF6–$FFFD even if they are not used for vectors.
If FLASH is erased, the eight security byte values to be sent to the MCU
are $FF, the unprogrammed state of the FLASH.
During monitor mode entry, a reset must be asserted. PTA1 must be
held low during the reset and 24 CGMXCLK cycles after the end of the
reset. Then the MCU will wait for eight security bytes on PTA0. Each
byte will be echoed back to the host. See
Figure 18-6. Stack Pointer at Monitor Mode Entry
Monitor ROM (MON)
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
HIGH BYTE OF PROGRAM COUNTER
LOW BYTE OF PROGRAM COUNTER
HIGH BYTE OF INDEX REGISTER
LOW BYTE OF INDEX REGISTER
CONDITION CODE REGISTER
ACCUMULATOR
Figure 18-7.
SP
SP + 1
SP + 2
SP + 3
SP + 4
SP + 5
SP + 6
SP + 7
MOTOROLA