MC68HC908KX2 MOTOROLA [Motorola, Inc], MC68HC908KX2 Datasheet - Page 81

• Manufacturer Part Number: MC68HC908KX2
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

6.3 SIM Bus Clock Control and Generation
6.3.1 Bus Timing
6.3.2 Clock Startup from POR or LVI Reset
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
ICG
ECLK
ICLK
The bus clock generator provides system clock signals for the CPU and
peripherals on the MCU. The system clocks are generated from an
incoming clock, CGMOUT, as shown in
from either an external oscillator or from the internal clock generator.
In user mode, the internal bus frequency is the internal clock generator
output (CGMXCLK) divided by four.
When the power-on reset (POR) module or the low-voltage inhibit (LVI)
module generates a reset, the clocks to the CPU and peripherals are
inactive and held in an inactive phase until after 4096 CGMXCLK cycles.
The MCU is held in reset by the SIM during this entire period. The bus
clocks start upon completion of the timeout.
CIRCUIT
SELECT
CLOCK
CS
ICG
MONITOR MODE
Figure 6-3. System Clock Signals
USER MODE
System Integration Module (SIM)
2
A
B S*
*
CGMOUT = B
CGMXCLK
CGMOUT
S = 1,
SIM Bus Clock Control and Generation
Figure
System Integration Module (SIM)
SIM COUNTER
2
6-3. This clock originates
SIM
GENERATORS
BUS CLOCK
Technical Data
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