MC68HC908KX2 MOTOROLA [Motorola, Inc], MC68HC908KX2 Datasheet - Page 91

• Manufacturer Part Number: MC68HC908KX2
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

6.6.1.2 SWI Instruction
6.6.2 Reset
6.7 Low-Power Modes
6.7.1 Wait Mode
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
NOTE:
NOTE:
The LDA opcode is prefetched by both the INT1 and INT2 RTI
instructions. However, in the case of the INT1 RTI prefetch, this is a
redundant operation.
To maintain compatibility with the M68HC05, M6805, and M146805
Families the H register is not pushed on the stack during interrupt entry.
If the interrupt service routine modifies the H register or uses the indexed
addressing mode, software should save the H register and then restore
it prior to exiting the routine.
The SWI instruction is a non-maskable instruction that causes an
interrupt regardless of the state of the interrupt mask (I bit) in the
condition code register.
A software interrupt pushes PC onto the stack. A software interrupt does
not push PC – 1, as a hardware interrupt does.
All reset sources always have higher priority than interrupts and cannot
be arbitrated.
Executing the WAIT or STOP instruction puts the MCU in a low power-
consumption mode for standby situations. The SIM holds the CPU in a
non-clocked state. Both STOP and WAIT clear the interrupt mask (I) in
the condition code register, allowing interrupts to occur. Low-power
modes are exited via an interrupt or reset.
In wait mode, the CPU clocks are inactive while one set of peripheral
clocks continues to run.
entry.
System Integration Module (SIM)
Figure 6-11
shows the timing for wait mode
System Integration Module (SIM)
Low-Power Modes
Technical Data
91