HD6412332 RENESAS [Renesas Technology Corp], HD6412332 Datasheet - Page 1167

• Manufacturer Part Number: HD6412332
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

TCR0—Timer Control Register 0
Bit
Initial value
Read/Write
:
:
:
CCLR2
R/W
7
0
Counter Clear
Notes: 1. Synchronous operation setting is performed by setting the
0
1
CCLR1
R/W
0
1
0
1
6
0
2. When TGRC or TGRD is used as a buffer register, TCNT is
0
1
0
1
0
1
0
1
SYNC bit in TSYR to 1.
not cleared because the buffer register setting has priority,
and compare match/input capture does not occur.
TCNT clearing disabled
TCNT cleared by TGRA compare match/input capture
TCNT cleared by TGRB compare match/input capture
TCNT cleared by counter clearing for another channel
performing synchronous clearing/synchronous operation*
TCNT clearing disabled
TCNT cleared by TGRC compare match/input capture*
TCNT cleared by TGRD compare match/input capture*
TCNT cleared by counter clearing for another channel
performing synchronous clearing/synchronous operation*
CCLR0
R/W
5
0
CKEG1
Clock Edge
R/W
0
1
4
0
—
0
1
CKEG0
R/W
Count at rising edge
Count at falling edge
Count at both edges
3
0
Time Prescaler
0
1
Rev.4.00 Sep. 07, 2007 Page 1137 of 1210
H'FFD0
0
1
0
1
TPSC2
R/W
2
0
0
1
0
1
0
1
0
1
Internal clock: counts on φ/1
Internal clock: counts on φ/4
Internal clock: counts on φ/16
Internal clock: counts on φ/64
External clock: counts on TCLKA pin input
External clock: counts on TCLKB pin input
External clock: counts on TCLKC pin input
External clock: counts on TCLKD pin input
TPSC1
R/W
1
0
2
2
TPSC0
1
1
R/W
0
0
REJ09B0245-0400
TPU0