HD6412332 RENESAS [Renesas Technology Corp], HD6412332 Datasheet - Page 213
HD6412332
Manufacturer Part Number
HD6412332
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6412332.pdf
(1244 pages)
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6.6
When burst mode is selected with the DRAM interface, the DACK output timing can be selected
with the DDS bit. When DRAM space is accessed in DMAC single address mode at the same
time, the DDS bit selects whether or not burst access is to be performed.
6.6.1
Burst access is performed by determining the address only, irrespective of the bus master. With
the DRAM interface, the DACK output goes low from the T
Figure 6.28 shows the DACK output timing for the DRAM interface when DDS = 1.
Note: n = 2 to 5
Read
Write
Figure 6.28 DACK Output Timing when DDS = 1 (Example of DRAM Access)
DMAC Single Address Mode and DRAM Interface
When DDS = 1
A
CS
CAS (UCAS)
LCAS (LCAS)
HWR (WE)
D
HWR (WE)
D
DACK
φ
23
15
15
n
to A
to D
to D
(RAS)
0
0
0
T
p
Row
T
r
Rev.4.00 Sep. 07, 2007 Page 183 of 1210
c1
state.
T
c1
Column
T
c2
REJ09B0245-0400
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