HD6412332 RENESAS [Renesas Technology Corp], HD6412332 Datasheet - Page 1180

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HD6412332

Manufacturer Part Number
HD6412332
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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TCR2—Timer Control Register 2
Rev.4.00 Sep. 07, 2007 Page 1150 of 1210
REJ09B0245-0400
Bit
Initial value
Read/Write
:
:
:
7
0
Counter Clear
Note: * Synchronous operation setting is performed by setting
0
1
CCLR1
0
1
0
1
R/W
6
0
the SYNC bit in TSYR to 1.
TCNT clearing disabled
TCNT cleared by TGRA compare match/input capture
TCNT cleared by TGRB compare match/input capture
TCNT cleared by counter clearing for another channel
performing synchronous clearing/synchronous operation*
CCLR0
R/W
5
0
CKEG1
Note: This setting is ignored when channel
Clock Edge*
R/W
4
0
0
1
2 is in phase counting mode.
0
1
CKEG0
R/W
Count at rising edge
Count at falling edge
Count at both edges
3
0
Note: This setting is ignored when channel 2 is in phase
Time Prescaler
H'FFF0
0
1
0
1
0
1
counting mode.
TPSC2
R/W
2
0
0
1
0
1
0
1
0
1
Internal clock: counts on φ/1
Internal clock: counts on φ/4
Internal clock: counts on φ/16
Internal clock: counts on φ/64
External clock: counts on TCLKA pin input
External clock: counts on TCLKB pin input
External clock: counts on TCLKC pin input
Internal clock: counts on φ/1024
TPSC1
R/W
1
0
TPSC0
R/W
0
0
TPU2

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