HD6412332 RENESAS [Renesas Technology Corp], HD6412332 Datasheet - Page 1170

• Manufacturer Part Number: HD6412332
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

TIOR0L—Timer I/O Control Register 0L
Rev.4.00 Sep. 07, 2007 Page 1140 of 1210
REJ09B0245-0400
Note: When TGRC or TGRD is designated for buffer operation, this setting is invalid and the register operates as a buffer register.
Bit
Initial value
Read/Write
Notes: 1. When bits TPSC2 to TPSC0 in TCR1 are set to B'000, and φ/1 is used as the
TGR0D I/O Control
:
:
:
:
0
1
IOD3
R/W
7
0
0
1
0
1
2. When the BFB bit in TMDR0 is set to 1 and TGR0D is used as a buffer register,
TCNT1 count clock, this setting is invalid and input capture does not occur.
this setting is invalid and input capture/output compare does not occur.
0
1
0
1
0
1
*
IOD2
R/W
0
1
0
1
0
1
0
1
0
1
*
*
6
0
TGR0D
is output
compare
register
*
TGR0D
is input
capture
register
*
2
2
IOD1
R/W
5
0
Output disabled
Initial output is
0 output
Output disabled
Initial output is
1 output
Capture input
source is
TIOCD
Capture input
source is channel
1/count clock
Note: When the BFA bit in TMDR0 is set to 1 and TGR0C is used as a buffer register,
IOD0
TGR0C I/O Control
R/W
0
0
1
4
0
pin
this setting is invalid and input capture/output compare does not occur.
0
1
0
1
IOC3
R/W
0
1
0
1
0
1
*
3
0
0 output at compare match
1 output at compare match
Toggle output at compare match
0 output at compare match
1 output at compare match
Toggle output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Input capture at TCNT1 count-up/
count-down
0
1
0
1
0
1
0
1
0
1
*
*
TGR0C
is output
compare
register
TGR0C
is input
capture
register
IOC2
R/W
2
0
*
H'FFD3
1
Output disabled
Initial output is
0 output
Output disabled
Initial output is
1 output
Capture input
source is
TIOCC
Capture input
source is channel
1/count clock
IOC1
R/W
1
0
0
* : Don't care
pin
IOC0
R/W
0
0
0 output at compare match
1 output at compare match
Toggle output at compare match
0 output at compare match
1 output at compare match
Toggle output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Input capture at TCNT1 count-up/
count-down
* : Don't care
TPU0