HD6412332 RENESAS [Renesas Technology Corp], HD6412332 Datasheet - Page 183

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HD6412332

Manufacturer Part Number
HD6412332
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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6.3.5
The chip can output chip select signals (CS
when the corresponding external space area is accessed.
Figure 6.3 shows an example of CS
Enabling or disabling of CS
(DDR) bit for the port corresponding to the particular CS
the CS25 enable bit (CS25E).
In expanded mode with on-chip ROM disabled, the CS0 pin is placed in the output state after a
reset. Pins CS
well as bits CS/67E and CS25E should be set to 1 when outputting signals CS
In expanded mode with on-chip ROM enabled, pins CS
after a reset, so the corresponding DDR bits as well as bits CS/67E and CS25E should be set to 1
when outputting signals CS
For details, see section 9, I/O Ports.
When areas 2 to 5 are designated as DRAM space, outputs CS
Chip Select Signals
1
to CS
Address
bus
CS
φ
n
7
are placed in the input state after a reset, so the corresponding DDR bits as
Figure 6.3 CS
1
n
to CS
signal output is performed by setting the data direction register
7
.
n
(n = 0 to 7) output timing.
n
T
Signal Output Timing (n = 0 to 7)
1
Area n external address
0
to CS
Bus cycle
7
) to areas 0 to 7, the signal being driven low
T
2
0
Rev.4.00 Sep. 07, 2007 Page 153 of 1210
n
to CS
pin, the CS/67 enable bit (CS/67E), and
2
7
to CS
are all placed in the input state
T
3
5
are used as RAS signals.
1
to CS
REJ09B0245-0400
7
.

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