HD6412332 RENESAS [Renesas Technology Corp], HD6412332 Datasheet - Page 239

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HD6412332

Manufacturer Part Number
HD6412332
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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7.2.2
IOAR is a 16-bit readable/writable register that specifies the lower 16 bits of the transfer source
address or destination address. The upper 8 bits of the transfer address are automatically set to
H'FF.
Whether IOAR functions as the source address register or as the destination address register can
be selected by means of the DTDIR bit in DMACR.
IOAR is invalid in single address mode.
IOAR is not incremented or decremented each time a transfer is executed, so the address specified
by IOAR is fixed.
IOAR is not initialized by a reset or in standby mode.
7.2.3
ETCR is a 16-bit readable/writable register that specifies the number of transfers. The setting of
this register is different for sequential mode and idle mode on the one hand, and for repeat mode
on the other.
Sequential Mode and Idle Mode
Bit
IOAR
Initial value :
R/W
Transfer Counter (ETCR)
Bit
Initial value :
R/W
I/O Address Register (IOAR)
Execute Transfer Count Register (ETCR)
:
:
:
: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
:
: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
15
15
*
*
14
14
*
*
13
13
*
*
12
12
*
*
11
11
*
*
10
10
*
*
9
9
*
*
8
*
8
*
Rev.4.00 Sep. 07, 2007 Page 209 of 1210
7
7
*
*
6
6
*
*
5
*
5
*
4
4
*
*
REJ09B0245-0400
3
3
*
*
2
*
2
*
*: Undefined
*: Undefined
1
1
*
*
0
*
0
*

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