HD6412332 RENESAS [Renesas Technology Corp], HD6412332 Datasheet - Page 27

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HD6412332

Manufacturer Part Number
HD6412332
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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19.21 Flash Memory Programming and Erasing Precautions ..................................................... 841
Section 20 Clock Pulse Generator
20.1 Overview........................................................................................................................... 847
20.2 Register Descriptions ........................................................................................................ 848
20.3 Oscillator........................................................................................................................... 850
20.4 Duty Adjustment Circuit................................................................................................... 854
20.5 Medium-Speed Clock Divider .......................................................................................... 854
20.6 Bus Master Clock Selection Circuit .................................................................................. 854
Section 21 Power-Down Modes
21.1 Overview........................................................................................................................... 855
21.2 Register Descriptions ........................................................................................................ 857
21.3 Medium-Speed Mode........................................................................................................ 861
21.4 Sleep Mode ....................................................................................................................... 862
21.5 Module Stop Mode............................................................................................................ 863
21.6 Software Standby Mode.................................................................................................... 865
21.7 Hardware Standby Mode .................................................................................................. 868
21.8 φ Clock Output Disabling Function .................................................................................. 869
20.1.1 Block Diagram..................................................................................................... 847
20.1.2 Register Configuration......................................................................................... 848
20.2.1 System Clock Control Register (SCKCR) ........................................................... 848
20.3.1 Connecting a Crystal Resonator........................................................................... 850
20.3.2 External Clock Input ............................................................................................ 852
21.1.1 Register Configuration......................................................................................... 856
21.2.1 Standby Control Register (SBYCR) .................................................................... 857
21.2.2 System Clock Control Register (SCKCR) ........................................................... 859
21.2.3 Module Stop Control Register (MSTPCR) .......................................................... 861
21.5.1 Module Stop Mode .............................................................................................. 863
21.5.2 Usage Notes ......................................................................................................... 864
21.6.1 Software Standby Mode....................................................................................... 865
21.6.2 Clearing Software Standby Mode ........................................................................ 865
21.6.3 Setting Oscillation Stabilization Time after Clearing Software Standby Mode... 866
21.6.4 Software Standby Mode Application Example.................................................... 866
21.6.5 Usage Notes ......................................................................................................... 867
21.7.1 Hardware Standby Mode ..................................................................................... 868
21.7.2 Hardware Standby Mode Timing......................................................................... 868
...................................................................................... 855
.................................................................................. 847
Rev.4.00 Sep. 07, 2007 Page xxvii of xxx

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