PSB7238 SIEMENS [Siemens Semiconductor Group], PSB7238 Datasheet - Page 41

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PSB7238

Manufacturer Part Number
PSB7238
Description
Joint Audio Decoder-Encoder - Multimode
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet

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Loop:
A read access from host to 4C
mailbox pointed to by the address register in 48
The address register is autoincremented.
Go to Loop.
Write
Host programs the desired start address (00
Loop:
A write access from host to 4C
mailbox pointed to by the address register in 4A
The address register is autoincremented.
Go to Loop.
(In the case of overflow, the address register 48
Software Handling of Communication via Mailbox
To indicate that data is ready to be read by the host/DSP, the DSP/host may use a
general purpose 8-bit interrupt register located in the host/DSP comm section of the
Directly Accessible Register Bank (DARB), associated with a 16-bit soft command and
status word in the same area. This protocol is implemented in software. The same
applies for indicating to the host/DSP that data has been read, in other words, the
memory in one direction is free. See example below for using the mailbox involving a
handshake protocol between the DSP and the host.
Simultaneous read/write is not prohibited by hardware, but a handshake mechanism
(via IND/INH software interrupt registers with optional control data) is implemented in
software.
Procedure from host to DSP (example):
Host
Write mailbox (1 to 256 bytes) if free (released by DSP)
Write word in control register (60-61
Write 8-bit vector in INH
Internally, this causes an INT1 interrupt to DSP, which recognizes a “soft interrupt”
(firmware)
DSP: services INT1 and acknowledges by writing an 8-bit vector in IND
Host
Read IND
Jump into routine pointed to by IND: “Mailbox release”
Write further data, etc.
I/O Access from the Host to the Mailbox (Summary)
Read
Host programs the desired start address (00
Semiconductor Group
H
H
gives the data from the current location in the read
writes the data into the current location in the write
H
) (e.g. number of bytes in mailbox)
41
H
H
to FF
to FF
H
H
H
Interfaces and Memory Organization
.
.
or 4A
H
H
) into address register 48
) into address register 4A
H
wraps around to 00
Data Sheet 1998-07-01
PSB 7238
H
.)
H
H
.
.

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