PSB7238 SIEMENS [Siemens Semiconductor Group], PSB7238 Datasheet - Page 53

• Manufacturer Part Number: PSB7238
• Description: Joint Audio Decoder-Encoder - Multimode
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

*
Figure 22
Caption to the Figures
In receive direction, the input data is loaded from the shift register into DSP accessible
read registers and simultaneously into (physically separate) host accessible read
registers.
In the transmit direction, data is loaded into the shift register from the transmit channel
register accessible from the DSP (if HXA = 0) or the register accessible from the host (if
HXA = 1). Two separate control bits HXA1 and HXA2 are provided for this purpose, for
audio channel 1 and audio channel 2, respectively.
HDLC/Transparent Data Channel Transfer
The interface between the input of the HDLC/transparent data receiver and the DSP or
host, and between the output of the transmitter and DSP or host is in each case a 32-bit
long shift register.
Receiver in LMOD(1:0) = 01, 10, 11
In receive direction, when the shift register from the serial line is filled to a programmable
level (1, 2 or 4), the whole 32-bit shift register is loaded into the HRR1/2 read registers,
physically separate for DSP and host. In the same cycle the contents of the HRW1/2
write register accessible from the DSP (if HHR1/2 = 0) or host (HHR1/2 = 1) are loaded
to the HDLC receiver input. In the next cycle the data from HRR1/2 is as a default loaded
into HRW1/2 and a maskable interrupt status BFHR1/2 is generated to the DSP and
host. The interrupt status is generated to both DSP and host, independent of the setting
of HAH1/2. If the data in HRR1/2 is to be pre-processed, the HRW1/2 register can be
overwritten by the DSP or host before the next 1, 2 or 4 bytes (programmable) have been
shifted into the shift register.
Semiconductor Group
Transmit 1,2:
DCL(/2)
FSC
RFS
SCLK
TFS
SCLK
SLIN
0x
10
11
2
M
U
X
Time-slot
Parameters
LMOD
Time-slot
Count
Logic
LBIT
5
Enable
BEMP
TS-Clock
Strobe
Load*
53
XCx
1 to 32 bits (LBIT)
Shift Register
Host/DSP
32 bits
Data Sheet 1998-07-01
SLIN
Functional Blocks
M
U
X
2
00
01
10
11
EN*Strobe
PSB 7238
DU
DD
SR
ST