PSB7238 SIEMENS [Siemens Semiconductor Group], PSB7238 Datasheet - Page 93

• Manufacturer Part Number: PSB7238
• Description: Joint Audio Decoder-Encoder - Multimode
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

TCONT
TFE
TFSEL
TFPS
TPRD(4-0)/
TREP(9-0)
Semiconductor Group
Continuous generation of TFS pulses
0
1
TFS Clock Edge
0
1
Transmit Frame Sync Select (only valid if TFS is output)
(in both cases the polarity is selected by TFPS)
0
1
TFS polarity select
0
1
Period of TFS pulse generation
Number of repetition of pulses
When TCONT = 0, TREP(9-0) gives the number of pulses (TREP + 1)
to be generated, spaced 16 bits apart (up to 1024 pulses).
When TCONT = 1, TPRD(4-0) gives the spacing of continuously
generated pulses in 16-bit word increments (up to 32).
A number of pulses (spaced 16-bit periods from each other)
equal to TREP + 1 (1, …, 1024) is generated upon an STX
command (see HDLC/transparent data controller register
description).
When ETFS bit is ‘1’ (see HDLC/transparent data controller
register description), continuous pulses on TFS are generated,
spaced TPRD + 1 (1, …, 32) 16-bit words from each other.
When TFS is generated by the PSB 7238 (= output), it changes
its state at the rising edge of the SCLK clock.
When TFS is generated by the PSB 7238 (= output), it changes
its state at the falling edge of the SCLK clock.
Single cycle TFS is generated
The data strobe is output on TFS pin. This only affects the TFS
pin, the internal frame sync is generated and is input to the
timeslot count logic of the audio receivers and transmitters
connected to SR and ST line as in case TFSEL = 0. The strobe
signals of all audio receivers and transmitters connected to SR
and ST line will be combined by logical OR.
Rising edge marks the beginning of a new frame on the TFS line.
Falling edge marks the beginning of a new frame on the TFS
line. If TFS is an output it is inverted vs. TFPS = 0
93
Register Description
Data Sheet 1998-07-01
PSB 7238