AT90PWM216-16SE ATMEL [ATMEL Corporation], AT90PWM216-16SE Datasheet - Page 216
AT90PWM216-16SE
Manufacturer Part Number
AT90PWM216-16SE
Description
8-bit Microcontroller with 16K Bytes In-System Programmable flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT90PWM216-16SE.pdf
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The number of data bits to be received can be configured with the URxS bits of EUCSRA
register.
The Manchester decoder provides a special mode where 16 or 17 data bits can be received. In
this mode the Manchester decoder can automatically detects if the seventeenth bit is Man-
chester encoded or not (seventeenth data bit or first stop bit). If the receiver detects a valid data
bit (Manchester transition) during the seventeenth bit time of the frame, the receiver will process
the frame as a 17-bit frame lenght and set the F1617 bit of EUCSRC register.
In Manchester mode, the clock used for sampling the EUSART input signal is programmed by
the baudrate generator.
The edge detector of the Manchester decoder is based upon a 16 bits up/down counter which
maximum value can be configured through the MUBRRH and MUBRRL registers.
The maximum counter value is given by the following formula:
MUBRR[H:L]=F
/ (baud rate frequency)
CLKIO
MBURR[H:L] is used to calibrate the detect window of the start bit and to detect time overflow of
the other bits.
19.3.4
Double Speed Operation (U2X)
Double Speed Operation is controlled by U2X bit in UCSRA.
See “Double Speed Operation
(U2X)” on page 188.
This mode of operation is not allowed in manchester bit coding.
Each ‘bit time’ in the Manchester serial frame is divided into two phases (See
Figure
19-4). The
counter counts during the first phase and counts down during the second one. When the data bit
transition is detected, the counter memorises the N1 counter value and start counting down.
When the counter reaches the zero value, it starts counting up again and the N1/2 value allows
to open the next detection window. This detection window defines the time zone where the next
data bit edge is sampled.
Figure 19-4. Manchester Decoder operation
Note:
N1 = MBURR[H:L]/2
AT90PWM216/316
216
7710D–AVR–08/09
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