AT90PWM216-16SE ATMEL [ATMEL Corporation], AT90PWM216-16SE Datasheet - Page 263

• Manufacturer Part Number: AT90PWM216-16SE
• Description: 8-bit Microcontroller with 16K Bytes In-System Programmable flash
• Manufacturer: ATMEL [ATMEL Corporation]

22.4.2
22.4.2.1
7710D–AVR–08/09
Digital to Analog Converter input Register – DACH and DACL
DALA = 0
In accordance with the
update of the DAC input values. The update will be generated by the rising edge of the selected
interrupt flag whether the interrupt is enabled or not.
Table 22-1.
• Bit 2 – DALA: Digital to Analog Left Adjust
Set this bit to left adjust the DAC input data.
Clear it to right adjust the DAC input data.
The DALA bit affects the configuration of the DAC data registers. Changing this bit affects the
DAC output on the next DACH writing.
• Bit 1 – DAOE: Digital to Analog Output Enable bit
Set this bit to output the conversion result on D2A,
Clear it to use the DAC internally.
• Bit 0 – DAEN: Digital to Analog Enable bit
Set this bit to enable the DAC,
Clear it to disable the DAC.
DACH and DACL registers contain the value to be converted into analog voltage.
Writing the DACL register forbid the update of the input value until DACH has not been written
too. So the normal way to write a 10-bit value in the DAC register is firstly to write DACL the
DACH.
In order to work easily with only 8 bits, there is the possibility to left adjust the input value. Like
this it is sufficient to write DACH to update the DAC value.
Bit
Read/Write
Initial Value
DATS2
0
0
0
0
1
1
1
1
DATS1
0
0
1
1
0
0
1
1
DAC Auto Trigger source selection
DAC7
R/W
R/W
7
0
0
-
Table
DAC6
R/W
R/W
DATS0
0
1
0
1
0
1
0
1
6
0
0
-
22-1, these 3 bits select the interrupt event which will generate the
DAC5
R/W
R/W
5
0
0
-
Description
Analog comparator 0
Analog comparator 1
External Interrupt Request 0
Timer/Counter0 Compare Match
Timer/Counter0 Overflow
Timer/Counter1 Compare Match B
Timer/Counter1 Overflow
Timer/Counter1 Capture Event
DAC4
R/W
R/W
4
0
0
-
DAC3
R/W
R/W
3
0
0
-
DAC2
AT90PWM216/316
R/W
R/W
2
0
0
-
DAC9
DAC1
R/W
R/W
1
0
0
DAC8
DAC0
R/W
R/W
0
0
0
DACH
DACL
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