AT90PWM216-16SE ATMEL [ATMEL Corporation], AT90PWM216-16SE Datasheet - Page 226

• Manufacturer Part Number: AT90PWM216-16SE
• Description: 8-bit Microcontroller with 16K Bytes In-System Programmable flash
• Manufacturer: ATMEL [ATMEL Corporation]

19.6.5
226
AT90PWM216/316
EUSART Status Register C – EUCSRC
• Bit 1 – Manchester mode
When set the EUSART operates in manchester encoder/decoder mode (Manchester encoded
frames). When cleared the EUSART detected and transmit level encoded frames.
Table 19-4.
As in Manchester mode the parity checker and generator are unavailable, the parity
should be configured to none ( write UPM1:0 to 00 in UCSRC), see Table 18-5.
• Bit 0 –Bit Order
This bit allows to change the bit ordering in the transmit and received frames.
Clear to transmit and receive LSB first (standard USART mode)
Set to transmit and receive MSB first.
• Bit 7:4 –Reserved Bits
These bits are reserved for future use. For compatibilty with future devices, these bits must be
written to zero when EUSCRC is written.
• Bit 3 –Frame Error Manchester
This bit is set by hardware when a framing error is detected in manchester mode. This bit is valid
when the RxC bit is set and until the receive buffer (UDR) is read.
• Bit 2 –F1617
When the receiver is configured for 16 or 17 bits in Manchester encoded mode, this bit indicates
if the received frame is 16 or 17 bits lenght.
Cleared: indicates that the received frame is 16 bits lenght.
Set: Indicates that the received frame is 17 bits lenght.
This bit is valid when the RxC bit is set and until the receive buffer (UDR) is read.
Bit
Read/Write
Initial Value
UMSEL
0
1
0
0
1
1
USART/EUSART modes selection summary
EMCH
R
7
0
-
X
X
0
1
0
1
R
6
0
EUSART
-
0
0
1
1
1
1
R
5
0
-
Mode
Asynchronous up to 9 bits level encoded (standard
asynchronous USART mode)
Synchronous up to 9 bits level encoded (standard
synchronous USART mode)
Asynchronous up to 17 bits level encoded
Asynchronous up to 17 bits Manchester encoded
Synchronous up to 17 bits level encoded
Reserved
R
4
0
-
FEM
R
3
0
F1617
R
2
0
STP1
R
1
0
STP0
R
0
0
7710D–AVR–08/09
EUCSRC