WM8351CGEB/RV WOLFSON [Wolfson Microelectronics plc], WM8351CGEB/RV Datasheet - Page 269

• Manufacturer Part Number: WM8351CGEB/RV
• Manufacturer: WOLFSON [Wolfson Microelectronics plc]

Production Data
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REGISTER
ADDRESS
BIT
10
9
8
7
6
5
4
3
2
GP10_INTMODE
GP9_INTMODE
GP8_INTMODE
GP7_INTMODE
GP6_INTMODE
GP5_INTMODE
GP4_INTMODE
GP3_INTMODE
GP2_INTMODE
LABEL
DEFAULT
0
0
0
0
0
0
0
0
0
GPIO10 Pin Mode
0 = GPIO interrupt is rising edge triggered, and is
taken after the effect of the GP10_CFG register bit.
1 = GPIO interrupt is both rising and falling edge
triggered.
Reset by state machine.
GPIO9 Pin Mode
0 = GPIO interrupt is rising edge triggered, and is
taken after the effect of the GP9_CFG register bit.
1 = GPIO interrupt is both rising and falling edge
triggered.
Reset by state machine.
GPIO8 Pin Mode
0 = GPIO interrupt is rising edge triggered, and is
taken after the effect of the GP8_CFG register bit.
1 = GPIO interrupt is both rising and falling edge
triggered.
Reset by state machine.
GPIO7 Pin Mode
0 = GPIO interrupt is rising edge triggered, and is
taken after the effect of the GP7_CFG register bit.
1 = GPIO interrupt is both rising and falling edge
triggered.
Reset by state machine.
GPIO6 Pin Mode
0 = GPIO interrupt is rising edge triggered, and is
taken after the effect of the GP6_CFG register bit.
1 = GPIO interrupt is both rising and falling edge
triggered.
Reset by state machine.
GPIO5 Pin Mode
0 = GPIO interrupt is rising edge triggered, and is
taken after the effect of the GP5_CFG register bit.
1 = GPIO interrupt is both rising and falling edge
triggered.
Reset by state machine.
GPIO4 Pin Mode
0 = GPIO interrupt is rising edge triggered, and is
taken after the effect of the GP4_CFG register bit.
1 = GPIO interrupt is both rising and falling edge
triggered.
Reset by state machine.
GPIO3 Pin Mode
0 = GPIO interrupt is rising edge triggered, and is
taken after the effect of the GP3_CFG register bit.
1 = GPIO interrupt is both rising and falling edge
triggered.
Reset by state machine.
GPIO2 Pin Mode
0 = GPIO interrupt is rising edge triggered, and is
taken after the effect of the GP2_CFG register bit.
1 = GPIO interrupt is both rising and falling edge
triggered.
Reset by state machine.
DESCRIPTION
PD, April 2012, Rev 4.5
REFER TO
WM8351
269