WM8351CGEB/RV WOLFSON [Wolfson Microelectronics plc], WM8351CGEB/RV Datasheet - Page 34

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WM8351CGEB/RV

Manufacturer Part Number
WM8351CGEB/RV
Description
Manufacturer
WOLFSON [Wolfson Microelectronics plc]
Datasheet
WM8351
10.4 AUDIO INTERFACE TIMING - TDM MODE
Figure 17 Digital Audio Data Timing - TDM Mode
w
Test Conditions
DBVDD = 3.3V, DGND = 0V, T
Audio Data Timing Information
ADCDAT setup time from BCLK falling edge
ADCDAT release time from BCLK falling edge
PARAMETER
In TDM mode, it is important that two ADC devices to not attempt to drive the ADCDAT pin
simultaneously. The timing of the WM8351 ADCDAT tri-stating at the start and end of the data
transmission is described in Figure 17 and the table below.
A
=+25
o
C, Master Mode, fs=48kHz, 24-bit data, unless otherwise stated.
DCVDD = 3.6V
DCVDD = 1.8V
DCVDD = 3.6V
DCVDD = 1.8V
CONDITIONS
MIN
TYP
15
15
5
5
PD, April 2012, Rev 4.5
MAX
Production Data
UNIT
ns
ns
ns
ns
34

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