CS8427 Cirrus Logic, CS8427 Datasheet - Page 26

• Manufacturer Part Number: CS8427
• Description: 96 kHz Digital Audio Interface Transceiver
• Manufacturer: Cirrus Logic

10. CONTROL PORT DESCRIPTION
The control port is used to access the registers, al-
lowing the CS8427 to be configured for the desired
operational modes and formats. In addition, Chan-
nel Status and User data may be read and written
through the control port. The operation of the con-
trol port may be completely asynchronous with re-
spect to the audio sample rates. However, to avoid
potential interference problems, the control port
pins should remain static if no operation is re-
quired.
The control port has two modes: SPI and Two-
Wire, with the CS8427 acting as a slave device. SPI
mode is selected if there is a high to low transition
on the AD0/CS pin after the RST pin has been
brought high. Two-Wire mode is selected by con-
necting the AD0/CS pin to VL+ or DGND, thereby
permanently selecting the desired AD0 bit address
state.
10.1 SPI Mode
In SPI mode, CS is the CS8427 chip select signal;
CCLK is the control port bit clock (input into the
CS8427 from the microcontroller); CDIN is the in-
put data line from the microcontroller; CDOUT is
the output data line to the microcontroller. Data is
clocked in on the rising edge of CCLK and out on
the falling edge.
Figure 19
SPI mode. To write to a register, bring CS low. The
first seven bits on CDIN form the chip address and
must be 0010000. The eighth bit is a read/write in-
dicator (R/W), which should be low to write. The
next eight bits form the Memory Address Pointer
(MAP), which is set to the address of the register
that is to be updated. The next eight bits are the data
which will be placed into the register designated by
the MAP. During writes, the CDOUT output stays
in the Hi-Z state. It may be externally pulled high
or low with a 47 kΩ resistor, if desired.
26
AND TIMING
shows the operation of the control port in
There is a MAP auto increment capability, enabled
by the INCR bit in the MAP register. If INCR is a
zero, the MAP will stay constant for successive
read or writes. If INCR is set to a 1, then the MAP
will autoincrement after each byte is read or writ-
ten, allowing block reads or writes of successive
registers.
To read a register, the MAP has to be set to the cor-
rect address by executing a partial write cycle
which finishes (CS high) immediately after the
MAP byte. The MAP auto increment bit (INCR)
may be set or not, as desired. To begin a read, bring
CS low, send out the chip address, and set the
read/write bit (R/W) high. The next falling edge of
CCLK will clock out the MSB of the addressed
register (CDOUT will leave the high impedance
state). If the MAP auto increment bit is set to 1, the
data for successive registers will appear consecu-
tively.
10.2
In Two-Wire mode, SDA is a bidirectional data
line. Data is clocked into and out of the part by
SCL, with the clock to data relationship as shown
in
CS8427 is given a unique address. Pins AD0 and
AD1 form the two least significant bits of the chip
address and should be connected to VL+ or DGND
as desired. The EMPH pin is used to set the AD2
bit, by connecting a resistor from the EMPH pin to
VL+ or to DGND. The state of the pin is sensed
while the CS8427 is being reset. The upper four
bits of the seven bit address field are fixed at 0010.
To communicate with a CS8427, the chip address
field, which is the first byte sent to the CS8427,
should be 0010 followed by the settings of the EM-
PH, AD1, and AD0. The eighth bit of the address is
the R/W bit. If the operation is a write, the next byte
is the Memory Address Pointer (MAP) which se-
lects the register to be read or written. If the opera-
tion is a read, the contents of the register pointed to
by the MAP will be output. Setting the auto incre-
Figure
Two-Wire
20. There is no CS pin. Each individual
Mode
CS8427
DS477PP3