CS8427 Cirrus Logic, CS8427 Datasheet - Page 4

• Manufacturer Part Number: CS8427
• Description: 96 kHz Digital Audio Interface Transceiver
• Manufacturer: Cirrus Logic

LIST OF FIGURES
LIST OF TABLES
4
Figure 1. Audio Port Master Mode Timing....................................................................................... 7
Figure 2. Audio Port Slave Mode and Data Input Timing ................................................................ 7
Figure 3. SPI Mode timing............................................................................................................... 8
Figure 4. Two-Wire Mode timing ..................................................................................................... 9
Figure 5. Recommended Connection Diagram for Software Mode............................................... 10
Figure 6. CS8427 Internal Block Diagram..................................................................................... 12
Figure 7. Jitter Attenuation Char.’s of PLL with 8 to 96 kHz Fs Filter Components-AES3 ............ 18
Figure 8. Jitter Attenuation Char.’s of PLL with 32 to 96 kHz Fs Filter Components-AES3 .......... 18
Figure 9. Software Mode Audio Data Flow Switching Options...................................................... 20
Figure 10. CS8427 Clock Routing................................................................................................. 21
Figure 11. AES3 Input to Serial Audio Output, Serial Audio Input to AES3 Out ........................... 22
Figure 13. Input Serial Port to AES3 Transmitter without PLL ...................................................... 22
Figure 12. AES3 Input to Serial Audio Output Only ...................................................................... 22
Figure 14. Input Serial Port to AES3 Transmitter with PLL ........................................................... 22
Figure 15. AES3 Receiver Timing for U pin output data ............................................................... 23
Figure 16. AES3 Transmitter Timing for C, U and V pin input data............................................... 23
Figure 17. Serial Audio Input Example Formats............................................................................ 24
Figure 18. Serial Audio Output Example Formats......................................................................... 25
Figure 19. Control Port Timing in SPI Mode.................................................................................. 27
Figure 20. Control Port Timing in Two-Wire Mode ........................................................................ 27
Figure 21. Hardware Mode............................................................................................................ 42
Figure 22. Professional Output Circuit .......................................................................................... 50
Figure 23. Consumer Output Circuit.............................................................................................. 50
Figure 24. TTL/CMOS Output Circuit ............................................................................................ 50
Figure 25. Professional Input Circuit ............................................................................................. 51
Figure 26. Transformerless Professional Input Circuit .................................................................. 51
Figure 27. Consumer Input Circuit ................................................................................................ 51
Figure 28. TTL/CMOS Input Circuit............................................................................................... 51
Figure 29. Channel Status Data Buffer Structure.......................................................................... 52
Figure 30. Flowchart for Reading the E Buffer .............................................................................. 53
Figure 31. Flowchart for Writing the E Buffer ................................................................................ 53
Table 1. PLL External Components using AES3 Receiver ........................................................... 18
Table 2. Control Register Map Summary ...................................................................................... 28
Table 3. Hardware Mode Start-up Options.................................................................................... 43
Table 4. Serial Audio Output Formats Available in Hardware Mode ............................................. 43
Table 5. Serial Audio Input Formats Available in Hardware Mode................................................ 43
CS8427
DS477PP3