CS8427 Cirrus Logic, CS8427 Datasheet - Page 42

• Manufacturer Part Number: CS8427
• Description: 96 kHz Digital Audio Interface Transceiver
• Manufacturer: Cirrus Logic

14. HARDWARE MODE DESCRIPTION
Hardware mode is selected by connecting the H/S
pin to ‘1’. Hardware Mode data flow is shown in
Figure
ceiver, and routed to the serial audio output port.
Different audio data synchronous to RMCK may
be input into the serial audio input port, and output
through the AES3 transmitter.
The channel status data, user data and validity bit
information are handled in 2 alternative modes: A
and B, determined by a start-up resistor on the
COPY pin. In mode A, the received PRO, COPY,
ORIG, EMPH, and AUDIO channel status bits are
output on pins. The transmitted channel status bits
are copied from the received channel status data,
and the transmitted U and V bits are 0.
In mode B, only the COPY and ORIG pins are out-
put, and reflect the received channel status data.
The transmitted channel status bits, user data and
validity bits are input serially through the PRO/C,
42
21. Audio data is input through the AES3 re-
RXP
RXN
RMCK
Power supply pins (VD+, VA+, DGND, AGND) & the reset pin (RST) and the PLL filter pin (FILT)
are omitted from this diagram. Please refer to the Typical Connection Diagram for hook-up details.
AES3 Rx
&
Decoder
RERR
VL+
H/S
Figure 21. Hardware Mode
PRO/C
SDOUT
OSCLK
Serial
Audio
Output
COPY ORIG EMPH/U AUDIO/V
EMPH/U and AUDIO/V pins.
23
The APMS pin allows the serial audio input port to
be set to master or slave.
If a validity, parity, bi-phase or lock receiver error
occurs, the current audio sample is passed unmod-
ified to the serial audio output port.
Start-up options are shown in
and allow choice of the serial audio output port as
a master or slave, whether TCBL is an input or an
output, the audio serial ports formats and the source
of the transmitted C, U and V data.
14.1 Serial Audio Port Formats
In hardware mode, only a limited number of alter-
native serial audio port formats are available. These
formats are described by
Table 5 on page
software mode bit settings for each format. Timing
diagrams are shown in
Figure 18 on page
OLRCK
shows the timing requirements.
C & U bit Data Buffer
ILRCK
ISCLK
Serial
Audio
Input
43, which define the equivalent
SDIN
25.
AES3
Encoder
& Tx
Figure 17 on page 24
Table 4 on page 43
TCBL
Table 3 on page
Figure 15 on page
APMS
TXP
TXN
CS8427
DS477PP3
and
and
43,