CS8427 Cirrus Logic, CS8427 Datasheet - Page 28

• Manufacturer Part Number: CS8427
• Description: 96 kHz Digital Audio Interface Transceiver
• Manufacturer: Cirrus Logic

11. CONTROL PORT REGISTER SUMMARY
11.1 Memory Address Pointer (MAP)
INCR - Auto Increment Address Control Bit
MAP6:MAP0 - Register address
Note: Reserved registers must not be written to during normal operation. Some reserved registers are used for test
modes, which can completely alter the normal operation of the CS8427.
28
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
10
11
12
13
14-1D
1E
1F-37
7F
Addr
INCR
7
Reserved
Control 1
Control 2
Data Flow Control
Clock Source Control
Serial Input Format
Serial Output Format
Interrupt 1 Status
Interrupt 2 Status
Interrupt 1 Mask
Interrupt 1 Mode (MSB)
Interrupt 1 Mode (LSB)
Interrupt 2 Mask
Interrupt 2 Mode (MSB)
Interrupt 2 Mode (LSB)
Receiver CS Data
Receiver Errors
Receiver Error Mask
CS Data Buffer Control
U Data Buffer Control
Q sub-code Data
OMCK/RMCK Ratio
C or U Data Buffer
ID and Version
Default = ‘0’
0 - Disable
1 - Enable
Function
MAP6
6
MAP5
5
SWCLK
TSLIPM
TSLIP1
TSLIP0
Table 2. Control Register Map Summary
SOMS
TSLIP
ORR7
AUX3
SIMS
ID3
7
0
0
0
0
0
0
0
0
0
0
0
0
OSLIPM
QCRCM
OSLIP1
OSLIP0
HOLD1
TXOFF
OSLIP
QCRC
ORR6
VSET
SOSF
AUX2
SISF
RUN
ID2
MAP4
6
0
0
0
0
0
0
0
4
MUTESAO
SORES1
CCRCM
SIRES1
HOLD0
AESBP
CCRC
ORR5
AUX1
BSEL
CLK1
ID1
5
0
0
0
0
0
0
0
0
0
0
MAP3
3
UNLOCKM
MUTEAES
UNLOCK
SORES0
RMCKF
SIRES0
CBMR
ORR4
TXD1
CLK0
AUX0
ID0
UD
4
0
0
0
0
0
0
0
0
0
MAP2
SOJUST
DETUM
SIJUST
DETU1
DETU0
DETCI
OUTC
DETU
UBM1
ORR3
TXD0
VER3
MMR
PRO
2
VM
3
V
0
0
0
0
0
0
CONFM
DETCM
EFTUM
SODEL
DETC1
DETC0
EFTU1
EFTU0
AUDIO
SIDEL
EFTCI
DETC
CONF
UBM0
ORR2
SPD1
EFTU
VER2
INT1
MMT
INC
2
0
MAP1
1
SOSPOL
MMTCS
SISPOL
EFTCM
EFTC1
EFTC0
QCHM
DETUI
QCH1
QCH0
COPY
ORR1
RXD1
SPD0
EFTC
VER1
BIPM
QCH
CAM
INT0
BIP
1
0
CS8427
DS477PP3
SOLRPOL
SILRPOL
MAP0
MMTLR
RERRM
RERR1
RERR0
TCBLD
RERR
PARM
EFTUI
RXD0
ORR0
ORIG
VER0
CHS
PAR
0
0
0
0
0
0
0
0