CS8427 Cirrus Logic, CS8427 Datasheet - Page 45

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CS8427

Manufacturer Part Number
CS8427
Description
96 kHz Digital Audio Interface Transceiver
Manufacturer
Cirrus Logic
Datasheet

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DS477PP3
TCBL
OSCLK
OLRCK
SDOUT
AUDIO/V
PRO/C
APMS
VL+
VL2+
H/S
TXN
TXN
ORIG
25
26
15
16
17
18
19
20
21
23
27
24
28
Transmit Channel Status Block Start (Input/Output) - When operated as output, TCBL is high during
the first sub-frame of a transmitted channel status block, and low at all other times. When operated as
input, driving TCBL high for at least three OMCK clocks will cause the next transmitted sub-frame to be
the start of a channel status block.
Serial Audio Output Bit Clock (Input/Output) - Serial bit clock for audio data on the SDOUT pin
Serial Audio Output Left/Right Clock (Input/Output) - Word rate clock for the audio data on the SDOUT
pin. Frequency will be the output sample rate (Fs)
Serial Audio Output Data (Output) - Audio data serial output pin
Audio Channel Status Bit / V-Bit (Input/Output) - Reflects either the state of the audio/nonaudio Chan-
nel Status bit in the incoming AES3 data stream or is the Validity bit data input for the AES3 transmitted
data stream, clocked by OLRCK.
PRO Channel Status Bit / C-Bit (Input/Output) - Reflects either the state of the Professional/Consumer
Channel Status bit in the incoming AES3 data stream or is the serial C-bit input for the AES3 transmitted
data, clocked by OLRCK.
Serial Audio Input Port Master/Slave Select (Input) - APMS should be connected to VL+ to set serial
audio input port as a master, or connected to DGND to set the port as a slave.
Positive Digital Power (Input) - Typically +3 to +5 V.
Hardware/Software Mode Control (Input) - Determines the method of controlling the operation of the
CS8427, and the method of accessing CS and U data. In software mode, device control and CS and U
data access is primarily through the control port, using a microcontroller. Hardware mode provides an
alternate mode of operation and access to the CS and U data through dedicated pins. This pin should be
permanently tied to VL+ or DGND
Differential Line Driver (Output) - Drivers transmit AES3 data and are pulled low while the CS8427 is in
the reset state.
ORIG Channel Status Bit (Output) - SCMS generation indicator. This is decoded from the incoming cat-
egory code and the L bit. A low output indicates that the source of the audio data stream is a copy. A high
indicates that the source of the audio data stream is an original recording. This is also a start-up option
pin, and requires a pull-up or pull-down resistor.
CS8427
45

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