MT90520AG ZARLINK [Zarlink Semiconductor Inc], MT90520AG Datasheet - Page 155

• Manufacturer Part Number: MT90520AG
• Description: 8-Port Primary Rate Circuit Emulation AAL1 SAR
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

7.2.2
Data Input Setup - MEM_DATA[17:0] VALID to
MCLK rising
Data Input Hold Time - MCLK rising to
MEM_DATA[17:0] INVALID
Clock to Change - MCLK rising to
(MEM_ADD[19:0], MEM_CS_X and MEM_WR)
change
Output Delay - MCLK rising to
(MEM_ADD[19:0] VALID and (MEM_CS_X and
MEM_WR) asserted)
MEM_DATA[17:0]
(flow-through)
MEM_DATA[17:0]
(pipelined)
MEM_ADD[19:0]
MEM_CS_X
MEM_WR
MCLK
External Memory Interface
Characteristic
Table 92 - External Memory Interface Timing - Read Cycle Parameters
t
OD
ADDRESS1 VALID
Figure 51 - External Memory Interface Timing - Read Cycle
t
OD
t
ADDRESS2 VALID
MH
Sym.
t
t
t
t
DIS
DIH
OC
OD
t
MP
Zarlink Semiconductor Inc.
DATA1 VALID
t
DIS
t
MT90520
ML
Min.
155
5
2
1
t
DIH
t
OC
t
OC
Typ.
DATA2 VALID
DATA1 VALID
Max.
12.5
Units
ns
ns
ns
ns
DATA2 VALID
C
C
C
C
L
L
L
L
= 35 pF
= 35 pF
= 35 pF
= 35 pF
Test Conditions
V
TT
V
V
V
V
TT
TT
TT
TT
Data Sheet
V
TT