MT90520AG ZARLINK [Zarlink Semiconductor Inc], MT90520AG Datasheet - Page 40

• Manufacturer Part Number: MT90520AG
• Description: 8-Port Primary Rate Circuit Emulation AAL1 SAR
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

Accesses to/from the external memory are made on a word-wide (i.e., 16-bit) basis. 2 optional bits,
MEM_DATA[17:16], can provide parity data regarding the external memory data. The external memory interface
module of the MT90520 generates MEM_DATA[17] to represent the even parity bit over MEM_DATA[15:8].
Similarly, MEM_DATA[16] represents the even parity bit over MEM_DATA[7:0]. When data is read from external
memory, the external memory interface module checks the parity bits of the data which is read. If there are parity
errors, they are reported in the Parity Error Status Register at byte address 7004h. A service enable bit may be set
to cause a CPU interrupt to be generated due to the occurrence of a parity error on reads of external memory data.
The external memory interface of the MT90520 supports up to 1 Mword of external memory. The configuration is
programmable via the Memory Arbiter Configuration Register at byte address 7000h, and some of the possible
configurations are listed in Table 10 below:
Number of Memory Banks
1
2
4
Table 10 - Possible Memory Configurations
Zarlink Semiconductor Inc.
Maximum Size of Each
Memory Bank (words)
MT90520
512 K
256 K
1 M
40
Maximum Total Memory Size
(words)
1 M
1 M
1 M
Data Sheet