MT90520AG ZARLINK [Zarlink Semiconductor Inc], MT90520AG Datasheet - Page 72
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MT90520AG
Manufacturer Part Number
MT90520AG
Description
8-Port Primary Rate Circuit Emulation AAL1 SAR
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.MT90520AG.pdf
(180 pages)
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Based on the ITU-T I.363.1 standard, the Correction/Detection state machine is capable of analyzing a byte of data.
It can then correct a single-bit error in the data or detect (but not correct) a two-bit error. A single-bit error is
classified as the occurrence of either: (i) a parity error or (ii) a CRC error AND a parity error. An uncorrectable error
occurs if a CRC error is detected without a corresponding parity error.
A brief description of the functionality is outlined below.
1. The state machine examines the AAL1 byte and checks for CRC and parity errors, based on hard-wired values
2. The type of error-processing which is performed depends upon the current state of the standardized state
Note * - When an errored SN cannot be corrected, the Correction/Detection state machine outputs the SN of the
input byte, uncorrected.
3. The most significant bit of the resulting sequence number (i.e., the CSI bit) may be processed further by the
4. At the end of cell processing, two pieces of information related to the Correction/Detection state machine are
contained within the MT90520. The state machine then outputs two pieces of information for use by the Fast SN
Processing state machine: a validity indicator and a sequence number. The validity signal indicates whether or
not the received byte was determined to be valid (i.e., it was either correct upon arrival, or was corrected by the
Correction/Detection state machine). The sequence number is that which was determined by the Correction/
Detection machine to be the intended sequence number.
machine, either Correction or Detection:
SRTS clock recovery sub-module (see Section ) or, in the SDT case, by the pointer-processing sub-module (see
“Pointer Processing” on page 80). The 3 least significant bits are transmitted to the Fast Sequence Number Pro-
cessing state machine as the current cell’s sequence number.
updated in the Reassembly Control Structure for the VC: the next state of this state machine (either Correction
or Detection) and the AAL1 Header Errors field.
Error?
Error?
CRC
CRC
Yes
Yes
Yes
Yes
No
No
No
No
Table 13 - Operation of Correction/Detection State Machine in Correction State
Table 14 - Operation of Correction/Detection State Machine in Detection State
Error?
Parity
Error?
Parity
Yes
Yes
Yes
Yes
No
No
No
No
correct - no need
correct - no need
Correctable?
Correctable?
Yes
Yes
No
No
No
No
Zarlink Semiconductor Inc.
MT90520
SN of input byte
SN of input byte
SN of input byte
Resulting SN
corrected SN
Resulting SN
don’t care *
don’t care *
don’t care *
don’t care *
72
Valid?
Valid?
Yes
Yes
Yes
No
Yes
No
No
No
AAL1 Header
AAL1 Header
Error
Error
+0
+1
+1
+1
+0
+1
+1
+1
Next State
Correction
Next State
Data Sheet
Correction
Detection
Detection
Detection
Detection
Detection
Detection
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