MT90520AG ZARLINK [Zarlink Semiconductor Inc], MT90520AG Datasheet - Page 169
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MT90520AG
Manufacturer Part Number
MT90520AG
Description
8-Port Primary Rate Circuit Emulation AAL1 SAR
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.MT90520AG.pdf
(180 pages)
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8.1.3
The following table lists all of the signals on the UTOPIA interface of the MT90520. In addition, it indicates what the
pin corresponds to in terms of the functionality of the UTOPIA standard, depending on the mode of operation of the
UTOPIA interface.
MT90520 Signal Name
UTO_OUT_DATA[15:8]
UTO_OUT_CLAVATM
UTO_OUT_DATA[7:0]
UTO_IN_DATA[15:8]
UTO_OUT_ADD[4:0]
UTO_OUT_ENBATM
UTO_IN_CLAVATM
UTO_IN_DATA[7:0]
UTO_IN_ENBATM
UTO_IN_ADD[4:0]
UTO_OUT_SOC
UTO_OUT_CLK
UTO_OUT_PAR
UTO_IN_SOC
UTO_IN_PAR
UTO_IN_CLK
_CLAVPHY
_CLAVPHY
UTOPIA Interface Connections
_ENBPHY
_ENBPHY
Direction
MT90520
Signal
Table 104 - MT90520 UTOPIA Signal Directions
I / O
I / O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
Standard Signal
Name - Level 1
RxData[7:0]
TxData[7:0]
RxSOC
RxEnb*
RxClav
TxSOC
TxEnb*
TxClav
RxPrty
TxPrty
RxClk
TxClk
ATM
Zarlink Semiconductor Inc.
-
-
-
-
MT90520
169
Standard Signal
Name - Level 1
RxData[7:0]
TxData[7:0]
RxSOC
RxEnb*
TxSOC
TxEnb*
RxClav
TxClav
RxPrty
TxPrty
RxClk
TxClk
PHY
-
-
-
-
Standard Signal
Name - Level 2
RxData[15:8]
TxData[15:8]
RxData[7:0]
TxData[7:0]
RxSOC
RxEnb*
RxClav
TxSOC
TxEnb*
TxClav
RxPrty
TxPrty
RxClk
TxClk
ATM
-
-
Standard Signal
Name - Level 2
RxData[15:8]
TxData[15:8]
TxAddr[4:0]
TxData[7:0]
RxAddr[4:0]
RxData[7:0]
RxSOC
RxEnb*
TxSOC
TxEnb*
RxClav
TxClav
RxPrty
TxPrty
RxClk
Data Sheet
TxClk
PHY
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