MT90520AG ZARLINK [Zarlink Semiconductor Inc], MT90520AG Datasheet - Page 56
![no-image](/images/no-image-200.jpg)
MT90520AG
Manufacturer Part Number
MT90520AG
Description
8-Port Primary Rate Circuit Emulation AAL1 SAR
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.MT90520AG.pdf
(180 pages)
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Cell discarded
Figure 18 - Overview of the UDT VCI/VPI Comparison and Look-up Table Filtering Process
In SDT
NO
comparisons are
UDT VCI/VPI
ignored
UKSEL=1?
-only
mode,
“00” (unknown)
YES
“01” (CBR)
32-cell internal UTOPIA
UDT VCI/VPI comparison
VPI/VCI Concatenation
Look-up Table Search
(search all
Ext. memory
field O = 1?
UDT Match
LUT entry
on Port p?
present?
Procedure
OAM
Zarlink Semiconductor Inc.
cell?
FIFO
DS
YES
YES
MT90520
YES
NO
8
ports)
56
YES
NO
NO
NO
“10” (non-CBR data)
“11” (discard)
OAM_SEL
_p = 1?
OAM
cell?
YES
NO
YES
NO
Address and cell sent to
Cell sent to the Data
Cell sent to the UDT
Cell sent to the Data
the SDT RX_SAR
Cell sent to the Data
SDT Reassembly
Control Structure
Cell discarded
Cell discarded
Cell discarded
Cell discarded
RX_SAR
RX_SAR
RX_SAR
RX_SAR
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