HC230 ALTERA [Altera Corporation], HC230 Datasheet - Page 112
HC230
Manufacturer Part Number
HC230
Description
HardCopy II Device Family
Manufacturer
ALTERA [Altera Corporation]
Datasheet
1.HC230.pdf
(228 pages)
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HardCopy Series Handbook, Volume 1
5–20
With the Altera
significantly. When changes are made to your design as ECOs, you do not
have to perform a full compilation in the Quartus II software. Instead,
you would make changes directly to the post place-and-route netlist,
generate a new programming file, test the revised design by performing
a gate-level simulation and timing analysis, and proceed to verify the fix
on the system (if you are using a Stratix II FPGA as a prototype). Once the
fix has been verified on the Stratix II FPGA, switch to the HardCopy II
revision, apply the same ECOs, run the timing analyzer and assembler,
perform a revision compare and then run the HardCopy II Netlist Writer
for design submission.
There are three scenarios from a migration point of view:
■
■
■
The following sections outline the methods for migrating each of these
types of changes.
Migrating One-to-One Changes
One-to-one changes are implemented using identical commands in both
architectures. In general, such changes include those that affect only I/O
cells or PLL cells. Some examples of one-to-one changes are changes such
as creating, deleting or moving pins, changing pin or PLL properties, or
changing pin connectivity (provided the source and destination of the
connectivity changes are I/Os or PLLs). These can be implemented
identically on both architectures.
If such changes are exported to Tcl, a direct reapplication of the generated
Tcl script (with a minor text edit) on the companion revision should
implement the appropriate changes as follows:
■
■
■
There are changes which can map one-to-one (that is, the same
change can be implemented on each architecture—Stratix II FPGA
and HardCopy II).
There are changes that must be implemented differently on the two
architectures to achieve the same result.
There are some changes that cannot be implemented on both
architectures.
Export the changes from the Change Manager to Tcl.
Open the generated Tcl script, change the line "project_open
<project> -revision <revision>" to refer to the appropriate companion
revision.
Apply the Tcl script to the companion revision.
®
Chip Planner tool, you can shorten the design cycle time
Altera Corporation
September 2008
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