HC230 ALTERA [Altera Corporation], HC230 Datasheet - Page 159
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HC230
Manufacturer Part Number
HC230
Description
HardCopy II Device Family
Manufacturer
ALTERA [Altera Corporation]
Datasheet
1.HC230.pdf
(228 pages)
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## Tcl Script to Generate PrimeTime STA File Output
execute_module -tool sta -args --tq2pt
execute_module -tool eda -args "--tool primetime --format verilog --timing_analysis"
Altera Corporation
September 2008
f
f
2.
Using Classic Timing Analyzer
You can run the timing analysis independent of the compile process in
one of two ways:
1.
2.
For more information on running static timing analysis in the Quartus II
software, refer to the Timing Analysis section in the Quartus II Handbook.
For Tcl commands related to static timing analysis, refer to the Timing
section of the Tcl Packages and Commands in the Quartus II Scripting
Reference Manual.
Static Timing Analysis in Primetime
The Quartus II software can also generate files required to run STA in
Synopsys’ PrimeTime. The following example Tcl commands direct the
Quartus II software to generate PrimeTime files for STA.
The files generated by the Quartus II software are organized in a
subdirectory within the project directory. For example, after compiling a
Stratix II prototype design (demo_design), the following verilog (.vo)
SDF (.sdo) and PrimeTime Tcl script (.tcl) are created in the project
directory.
timing\
The Tcl script includes all timing constraints applied during the
Quartus II software compilation.
Run the quartus_sta interactive Tcl shell independently and
execute Tcl commands and scripts at the Tcl prompt.
Use the execute_module -tool tan Tcl command to run a
timing analysis Tcl script in quartus_tan from within the basic
quartus shell, quartus_sh.
Run the quartus_tan interactive Tcl shell independently and
execute Tcl commands and scripts at the Tcl prompt.
primetime\
demo_design_v.sdo
demo_design.pt.tcl
demo_design.collections.sdc
demo_design.constraints.sdc
Performing Static Timing Analysis
6–31
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