HC230 ALTERA [Altera Corporation], HC230 Datasheet - Page 198

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HC230

Manufacturer Part Number
HC230
Description
HardCopy II Device Family
Manufacturer
ALTERA [Altera Corporation]
Datasheet

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HardCopy Series Handbook, Volume 1
8–10
Notes to
(1)
(2)
(3)
SSTL-2 class I and II
SSTL-18 class I and II
1.8-V HSTL class I and II Voltage referenced
1.5-V HSTL class I and II Voltage referenced
PCI / PCI-X
Differential SSTL-2 class
I and II input
Differential SSTL-2 class
I and II output
Differential SSTL-18
class I and II input
Differential SSTL-18
class I and II output
1.8-V differential HSTL
class I and II input
1.8-V differential HSTL
class I and II output
1.5-V differential HSTL
class I and II input
1.5-V differential HSTL
class I and II output
LVDS
HyperTransport™
technology
Table 8–6. Hardcopy II Supported I/O Standards on User I/O Pins (Part 2 of 2)
Like Stratix II devices, the optional PCI clamp is only available on column I/O pins. General purpose IOEs on the
right row I/O pins do not support the PCI clamp.
Similar to Stratix II devices, these I/O standards are only available on input clock pins, output clock pins in I/O
banks 9, 10, 11, 12, and DQS pins in top I/O banks 3, 4 for all HardCopy II devices, and DQS pins in bottom I/O
banks 7 and 8 for HC230 and HC240 devices.
Pseudo-differential HSTL and SSTL inputs only use the positive polarity input in the speed path. The negative
input is not connected internally. Pseudo-differential HSTL and SSTL outputs use two single-ended outputs with
the second output programmed as inverted. This is similar to a Stratix II device implementation.
I/O Standard
Table
8–6:
Voltage referenced
Voltage referenced
Single-ended
Pseudo differential
Pseudo differential
Pseudo differential
Pseudo differential
Pseudo differential
Pseudo differential
Pseudo differential
Pseudo differential
Differential
Differential
Type
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
3.3/2.5/
3.3/2.5/
3.3/2.5/
3.3/2.5/
1.8/1.5
1.8/1.5
1.8/1.5
1.8/1.5
Input
2.5
1.8
1.8
1.5
3.3
2.5
2.5
V
CCIO
Level (V)
Output
2.5
1.8
1.8
1.5
3.3
2.5
1.8
1.8
1.5
2.5
2.5
Interface
Memory
IOEs
v
v
v
v
v
(2)
(2)
(2)
(2)
(2)
(2)
(2)
Purpose
General
1.8/1.5
Altera Corporation
IOEs
(1)
September 2008
Speed
High-
IOEs
(2)
v
v

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