HC230 ALTERA [Altera Corporation], HC230 Datasheet - Page 157

• Manufacturer Part Number: HC230
• Description: HardCopy II Device Family
• Manufacturer: ALTERA [Altera Corporation]

Comparing
FPGA and
HardCopy
Revisions
Altera Corporation
September 2008
<revision>.upc.rpt
<revision>.asm.rpt
<revision>.rec.rpt
<revision>.flow.rpt
<revision>.sta.rpt
Table 6–9. Stratix II Compile Report File Descriptions
Switch
Timing Constraint
Checker
Assembler
Companion Revision
Comparison
Flow
TimeQuest
Before submitting the HardCopy II project to the Altera Design Center, it
should be checked against the Stratix II prototype FPGA revision. To do
this, run the execute_hardcopyii Tcl command with the -compare
option from the quartus_sh shell:
tcl> execute_hardcopyii -compare
Running this command generates a report file and summary file in the
project directory. These files are called <revision_name>.rec.rpt and
<revision_name>.rec.summary. The command checks to verify that the
following items conform to HardCopy II design rules and are consistent
between the HardCopy II and Stratix II revisions:
■
■
■
■
■
■
■
■
■
Any errors or failures in comparison are reported in the .rec report files.
An example .rec file is given below. Note that for this example, the design
comparison checks in the HardCopy II Companion Revision Comparison
Summary table are all marked passed, indicating that the HardCopy II
design in the Quartus II software is finished and ready for hand-off to the
back-end engineering team in the Altera Design Center.
You must resolve any failures that show up in the Comparison Summary
before you proceed any further with your design.
Tool
Source design files and device netlist files
User clock assignments
Timing constraints (assignments)
I/O location and type assignments
PLL parameters
Memory implantation parameters
DSP implementation parameters
Global resource properties
Properties of all other device resources used
Constraint coverage information.
Assembler settings, .pof and .sof output file options, and
messages.
A status report on the structural comparison between the
HardCopy II revision and the Stratix II Prototype design.
Resource summary and execution time for each tool in the flow.
This report is updated as different tools in the flow complete.
TimeQuest timing analysis report.
(Part 2 of 2)
Comparing FPGA and HardCopy Revisions
Description
6–29