HC230 ALTERA [Altera Corporation], HC230 Datasheet - Page 32
HC230
Manufacturer Part Number
HC230
Description
HardCopy II Device Family
Manufacturer
ALTERA [Altera Corporation]
Datasheet
1.HC230.pdf
(228 pages)
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HardCopy Series Handbook, Volume 1
2–24
Preliminary
HC240
Table 2–11. DQS and DQ Bus Mode Support (Part 2 of 2)
Device
1,020-pin FineLine BGA
1,508-pin FineLine BGA
Package
The programmable drive strengths available vary depending on the I/O
standard used. The options are listed in
Memory interface IOEs support both non-calibrated and calibrated
on-chip series termination. 50- and 25-Ω on-chip series termination is
available for 3.3-, 2.5-, or 1.8-V I/O standards. 50-Ω on-chip series
termination is available for 1.5- or 1.2-V I/O standards (pending
characterization).
1
3.3-V LVTTL
3.3-V LVCMOS
2.5-V LVTTL/LVCMOS
1.8-V LVTTL/LVCMOS
1.5-V LVCMOS
SSTL-2 class I
SSTL-2 class II
SSTL-18 class I
SSTL-18 class II
1.8-V HSTL class I
1.8-V HSTL class II
1.5-V HSTL class I
1.5-V HSTL class II
Table 2–12. Programmable Drive Strength Support for Memory Interface
IOEs
If on-chip series termination is enabled, programmable drive
strength support is not available.
Number of ×4
I/O Standard
Groups
36
36
Number of ×8/×9
Groups
18
18
Programmable Drive Strength Options (mA)
Table
×16/×18 Groups
Number of
4, 8, 12, 16, 20, 24
4, 8, 12, 16, 20, 24
2, 4, 6, 8, 10, 12
2–12.
4, 6, 8, 10, 12
4, 6, 8, 10, 12
4, 6, 8, 10, 12
8, 16, 18, 20
4, 8, 12, 16
8
8
16, 20, 24
16, 18, 20
16, 18, 20
2, 4, 6, 8
8, 12
Altera Corporation
September 2008
×32/×36 Groups
Number of
4
4
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