ATSAM3X4EA-AU Atmel, ATSAM3X4EA-AU Datasheet - Page 108

• Manufacturer Part Number: ATSAM3X4EA-AU
• Description: ARM Microcontrollers - MCU QFP144,GREEN, IND TEMP, MRL A
• Manufacturer: Atmel

Specifications of ATSAM3X4EA-AU

• Rohs: yes
• Core: ARM Cortex M3
• Processor Series: SAM3X
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 84 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 64 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2.4 V to 3.6 V
• Operating Temperature Range: - 40 C to +85 C
• Package / Case: LQFP-144
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 60

12.12.4.2
12.12.4.3
12.12.4.4
12.12.4.5
12.12.5
12.12.5.1
108
108
STRBTEQ
LDRHT
SAM3X/A
SAM3X/A
LDR, PC-relative
Operation
Restrictions
Condition flags
Examples
Syntax
R4, [R7]
R2, [R2, #8]
cond
Rt
Rn
offset
These load and store instructions perform the same function as the memory access instructions
with immediate offset, see
these instructions have only unprivileged access even when used in privileged software.
When used in unprivileged software, these instructions behave in exactly the same way as nor-
mal memory access instructions with immediate offset.
In these instructions:
These instructions do not change the flags.
Load register from memory.
where:
type
cond
• Rn must not be PC
• Rt must not be SP and must not be PC.
LDR{type}{cond} Rt, label
LDRD{cond} Rt, Rt2, label
SH
-
B
SB
H
SH
-
; Conditionally store least significant byte in
; R4 to an address in R7, with unprivileged access
; Load halfword value from an address equal to
; sum of R2 and 8 into R2, with unprivileged access
signed halfword, sign extend to 32 bits (LDR only).
omit, for word.
is an optional condition code, see
is the register to load or store.
is the register on which the memory address is based.
is an offset from Rn and can be 0 to 255.
If offset is omitted, the address is the value in Rn.
is one of:
unsigned byte, zero extend to 32 bits.
signed byte, sign extend to 32 bits.
unsigned halfword, zero extend to 32 bits.
signed halfword, sign extend to 32 bits.
omit, for word.
is an optional condition code, see
“LDR and STR, immediate offset” on page
; Load two words
“Conditional execution” on page
“Conditional execution” on page
104. The difference is that
11057B–ATARM–28-May-12
11057B–ATARM–28-May-12
100.
100.