ATSAM3X4EA-AU Atmel, ATSAM3X4EA-AU Datasheet - Page 424
ATSAM3X4EA-AU
Manufacturer Part Number
ATSAM3X4EA-AU
Description
ARM Microcontrollers - MCU QFP144,GREEN, IND TEMP, MRL A
Manufacturer
Atmel
Datasheet
1.ATSAM3X8EA-AU.pdf
(1467 pages)
Specifications of ATSAM3X4EA-AU
Rohs
yes
Core
ARM Cortex M3
Processor Series
SAM3X
Data Bus Width
32 bit
Maximum Clock Frequency
84 MHz
Program Memory Size
256 KB
Data Ram Size
64 KB
On-chip Adc
Yes
Operating Supply Voltage
2.4 V to 3.6 V
Operating Temperature Range
- 40 C to +85 C
Package / Case
LQFP-144
Mounting Style
SMD/SMT
Factory Pack Quantity
60
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• DS: Drive Strength (only for low-power SDRAM)
DS parameter is transmitted to the SDRAM during initialization to select the SDRAM strength of data output. This parame-
ter must be set according to the SDRAM device specification.
After initialization, as soon as DS field is modified and self-refresh mode is activated, the Extended Mode Register is
accessed automatically and DS bits are updated before entry in self-refresh mode. This feature is not supported when
SDRAMC shares an external bus with another controller.
• TIMEOUT: Time to define when low-power mode is enable
Values which are not listed in the table must be considered as “reserved”.
424
424
Value
00
01
10
SAM3X/A
SAM3X/A
LP_LAST_XFER_128
LP_LAST_XFER_64
LP_LAST_XFER
Name
The SDRAM controller activates the SDRAM low-power mode immediately after the end
of the last transfer.
The SDRAM controller activates the SDRAM low-power mode 64 clock cycles after the
end of the last transfer.
The SDRAM controller activates the SDRAM low-power mode 128 clock cycles after the
end of the last transfer.
Description
11057B–ATARM–28-May-12
11057B–ATARM–28-May-12
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