DS26514G Maxim Integrated, DS26514G Datasheet - Page 240
DS26514G
Manufacturer Part Number
DS26514G
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS26514G.pdf
(305 pages)
Specifications of DS26514G
Part # Aliases
90-26514-G00
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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 1: Open-Circuit Status (OCS). A real-time bit that is set when the LIU detects that the TTIPn and TRINGn
outputs are open-circuited.
19-5856; Rev 4; 5/11
Bit 5: Over Equalized (OEQ). The equalizer is over equalized. This can happen if there very large unexpected
resistive loss. This could result if monitor mode is used and the device is not placed in monitor mode. This indicator
provides more qualitative information to the receive loss indicators.
Bit 4: Under Equalized (UEQ). The equalizer is under equalized. A signal with a very high resistive gain is being
applied. This indicator provides more qualitative information to the receive loss indicators.
Bit 3: Receive Short-Circuit Status (RSCS). A real-time bit set when the LIU detects that the RTIPn and RRINGn
inputs are short-circuited. The load resistance has to be 25Ω (typically) or less for short circuit detection.
Bit 2: Transmit Short-Circuit Status (TSCS). A real-time bit set when the LIU detects that the TTIPn and
TRINGn outputs are short-circuited. The load resistance has to be 25Ω (typically) or less for short circuit detection.
Bit 0: Loss of Signal Status (LOSS). A real-time bit that is set when the LIU detects an LOS condition at RTIPn
and RRINGn.
—
7
0
LRSR
LIU Real Status Register
1003h + (20h x (n - 1)) : where n = 1 to 4
—
6
0
OEQ
5
0
UEQ
4
0
RSCS
3
0
DS26514 4-Port T1/E1/J1 Transceiver
TSCS
2
0
OCS
1
0
240 of 305
LOSS
0
0
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