DS26514G Maxim Integrated, DS26514G Datasheet - Page 76

• Manufacturer Part Number: DS26514G
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS26514G

• Part # Aliases: 90-26514-G00

9.10.1.4
The HDLC status registers in the DS26514 allow for flexible software interface to meet the user’s preferences.
When receiving HDLC messages, the host can choose to be interrupt driven, to poll to desired status registers, or a
combination of polling and interrupt processes can be used. An example routine for using the DS26514 HDLC
receiver is given in
Figure 9-17. HDLC Message Receive Example
19-5856; Rev 4; 5/11
Receive HDLC-64 Example
Message Buffer
Message Buffer
Start New
Start New
Figure
9-17.
Rx HDLC FIFO (RHF)
Take appropriate action
Packet Status (PS2..0)
Read N Bytes From
N = RHPBA[5..0]
Read RRTS5 for
NO
(RHC, RHBSE, RHFC)
Configure Receive
Message Buffer
Message Buffer
Enable Interrupts
RPE and RHWM
HDLC Controller
HDLC Controller
Reset Receive
(MS = RHPBA[7])
Read Register
Start New
Start New
Interrupt?
MS = 1?
(RHC.6)
RHPBA
YES
Rx HDLC FIFO (RHF)
Read N Bytes From
N = RHPBA[5..0]
YES
NO
Work Another Process.
No Action Required
DS26514 4-Port T1/E1/J1 Transceiver
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