TDGL007 Microchip Technology, TDGL007 Datasheet - Page 145

• Manufacturer Part Number: TDGL007
• Description: Development Boards & Kits - PIC / DSPIC DIGILENT CEREBOT MC7 MOTOR CONTROL BRD
• Manufacturer: Microchip Technology

Specifications of TDGL007

• Product: Development Boards
• Interface Type: CAN, I2C
• Operating Supply Voltage: 5 V

9.0
FIGURE 9-1:
© 2011 Microchip Technology Inc.
Note 1: This data sheet summarizes the fea-
Note 1: See
SOSCO
R
SOSCI
(2)
2: Some registers and associated bits
2: If the Oscillator is used with XT or HS modes, an extended parallel resistor with the value of 1 MΩ must be connected.
3: The term,
OSCILLATOR
CONFIGURATION
OSC1
OSC2
tures of the dsPIC33FJXXXMCX06A/
X08A/X10A family of devices. How-
ever, it is not intended to be a compre-
hensive
complement the information in this data
sheet, refer to Section 7. “Oscillator”
(DS70186) in the “dsPIC33F/PIC24H
Family Reference Manual”, which is
available from the Microchip web site
(www.microchip.com).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
out this document
when Doze mode is used in any ratio other than 1:1, which is the default.
TUN<5:0>
Oscillator
FRC
Figure 9-2
Primary Oscillator
Secondary Oscillator
POSCMD<1:0>
Oscillator
F
dsPIC33FJXXXMCX06A/X08A/X10A OSCILLATOR SYSTEM DIAGRAM
P
LPRC
refers to the clock source for all the peripherals, while
reference
dsPIC33FJXXXMCX06A/X08A/X10A
for PLL details.
LPOSCEN
F
P
and
S1
S3
÷ 16
F
CY
source.
are used interchangeably, except in the case of Doze mode.
FRCDIV<2:0>
PLL
To
(1)
in
ECPLL, FRCPLL
XTPLL, HSPLL,
Clock Fail
The dsPIC33FJXXXMCX06A/X08A/X10A oscillator
system provides the following:
• Various external and internal oscillator options as
• An on-chip PLL to scale the internal operating
• The internal FRC oscillator can also be used with
• Clock switching between various clock sources
• Programmable clock postscaler for system power
• A Fail-Safe Clock Monitor (FSCM) that detects
• A Clock Control register (OSCCON)
• Nonvolatile Configuration bits for main oscillator
A simplified diagram of the oscillator system is shown
in
S7
XT, HS, EC
FRCDIV16
FRCDIVN
clock sources
frequency to the required system clock frequency
the PLL, thereby allowing full-speed operation
without any external clock generation hardware
savings
clock failure and takes fail-safe measures
selection
Figure
SOSC
LPRC
FRC
NOSC<2:0>
F
Clock Switch
CY
9-1.
S5
S4
S2
S1/S3
S7
S6
S0
refers to the clock source for the CPU. Through-
÷ 2
FNOSC<2:0>
Reset
DOZE<2:0>
F
P
and
DS70594C-page 145
WDT, PWRT,
F
CY
will be different
Timer1
FSCM
F
F
OSC
F
P
CY
(3)