TDGL007 Microchip Technology, TDGL007 Datasheet - Page 355

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TDGL007

Manufacturer Part Number
TDGL007
Description
Development Boards & Kits - PIC / DSPIC DIGILENT CEREBOT MC7 MOTOR CONTROL BRD
Manufacturer
Microchip Technology
Datasheet

Specifications of TDGL007

Product
Development Boards
Interface Type
CAN, I2C
Operating Supply Voltage
5 V
PORTC
PORTD
PORTE
PORTF
PORTG
Power-Saving Features .................................................... 155
Program Address Space ..................................................... 37
Program Memory
Q
Quadrature Encoder Interface (QEI) ................................. 193
Quadrature Encoder Interface (QEI) Module
R
Reader Response ............................................................. 360
Registers
© 2011 Microchip Technology Inc.
Register Map............................................................... 63
Register Map............................................................... 63
Register Map............................................................... 63
Register Map............................................................... 63
Register Map............................................................... 64
Clock Frequency and Switching................................ 155
Construction................................................................ 70
Data Access from Program Memory Using
Data Access from Program Memory Using
Data Access from, Address Generation...................... 71
Memory Map ............................................................... 37
Table Read High Instructions
Table Read Low Instructions
Visibility Operation ...................................................... 73
Interrupt Vector ........................................................... 38
Organization................................................................ 38
Reset Vector ............................................................... 38
Register Map............................................................... 52
ADxCHS0 (ADCx Input Channel 0 Select) ............... 254
ADxCHS123 (ADCx Input Channel 1, 2, 3 Select) ... 253
ADxCON1 (ADCx Control 1)..................................... 248
ADxCON2 (ADCx Control 2)..................................... 250
ADxCON3 (ADCx Control 3)..................................... 251
ADxCON4 (ADCx Control 4)..................................... 252
ADxCSSH (ADCx Input Scan Select High)............... 255
ADxCSSL (ADCx Input Scan Select Low) ................ 255
ADxPCFGH (ADCx Port Configuration High) ........... 256
ADxPCFGL (ADCx Port Configuration Low)............. 256
CiBUFPNT1 (ECAN Filter 0-3 Buffer Pointer)........... 231
CiBUFPNT2 (ECAN Filter 4-7 Buffer Pointer)........... 232
CiBUFPNT3 (ECAN Filter 8-11 Buffer Pointer)......... 233
CiBUFPNT4 (ECAN Filter 12-15 Buffer Pointer)....... 234
CiCFG1 (ECAN Baud Rate Configuration 1) ............ 228
CiCFG2 (ECAN Baud Rate Configuration 2) ............ 229
CiCTRL1 (ECAN Control 1) ...................................... 220
CiCTRL2 (ECAN Control 2) ...................................... 221
CiEC (ECAN Transmit/Receive Error Count)............ 227
CiFCTRL (ECAN FIFO Control)................................ 223
CiFEN1 (ECAN Acceptance Filter Enable) ............... 230
CiFIFO (ECAN FIFO Status)..................................... 224
CiFMSKSEL1 (ECAN Filter 7-0 Mask Selection)...... 236
CiFMSKSEL2 (ECAN Filter 15-8 Mask Selection).... 237
CiINTE (ECAN Interrupt Enable) .............................. 226
CiINTF (ECAN Interrupt Flag)................................... 225
CiRXFnEID (ECAN Acceptance Filter n
Program Space Visibility ..................................... 73
Table Instructions ............................................... 72
TBLRDH ............................................................. 72
TBLRDL .............................................................. 72
Extended Identifier)........................................... 235
dsPIC33FJXXXMCX06A/X08A/X10A
CiRXFnSID (ECAN Acceptance Filter n
CiRXFUL1 (ECAN Receive Buffer Full 1)................. 239
CiRXFUL2 (ECAN Receive Buffer Full 2)................. 239
CiRXMnEID (ECAN Acceptance Filter
CiRXMnSID (ECAN Acceptance Filter Mask n
CiRXOVF1 (ECAN Receive Buffer Overflow 1)........ 240
CiRXOVF2 (ECAN Receive Buffer Overflow 2)........ 240
CiTRBnDLC (ECAN Buffer n Data Length Control).. 243
CiTRBnDm (ECAN Buffer n Data Field Byte m)....... 243
CiTRBnEID (ECAN Buffer n Extended Identifier) ..... 242
CiTRBnSID (ECAN Buffer n Standard Identifier)...... 242
CiTRBnSTAT (ECAN Receive Buffer n Status)........ 244
CiTRmnCON (ECAN TX/RX Buffer m Control) ........ 241
CiVEC (ECAN Interrupt Code) ................................. 222
CLKDIV (Clock Divisor) ............................................ 150
CORCON (Core Control)...................................... 30, 92
DFLTxCON (Digital Filter x Control) ......................... 196
DMACS0 (DMA Controller Status 0) ........................ 141
DMACS1 (DMA Controller Status 1) ........................ 143
DMAxCNT (DMA Channel x Transfer Count)........... 140
DMAxCON (DMA Channel x Control)....................... 137
DMAxPAD (DMA Channel x Peripheral Address) .... 140
DMAxREQ (DMA Channel x IRQ Select) ................. 138
DMAxSTA (DMA Channel x RAM Start
DMAxSTB (DMA Channel x RAM Start
DSADR (Most Recent DMA RAM Address) ............. 144
I2CxCON (I2Cx Control)........................................... 205
I2CxMSK (I2Cx Slave Mode Address Mask)............ 209
I2CxSTAT (I2Cx Status) ........................................... 207
ICxCON (Input Capture x Control)............................ 174
IEC0 (Interrupt Enable Control 0) ............................. 105
IEC1 (Interrupt Enable Control 1) ............................. 107
IEC2 (Interrupt Enable Control 2) ............................. 109
IEC3 (Interrupt Enable Control 3) ............................. 111
IEC4 (Interrupt Enable Control 4) ............................. 113
IFS0 (Interrupt Flag Status 0) ..................................... 96
IFS1 (Interrupt Flag Status 1) ..................................... 98
IFS2 (Interrupt Flag Status 2) ................................... 100
IFS3 (Interrupt Flag Status 3) ................................... 102
IFS4 (Interrupt Flag Status 4) ................................... 104
INTCON1 (Interrupt Control 1) ................................... 93
INTCON2 (Interrupt Control 2) ................................... 95
INTTREG (Interrupt Control and Status) .................. 132
IPC0 (Interrupt Priority Control 0) ............................. 114
IPC1 (Interrupt Priority Control 1) ............................. 115
IPC10 (Interrupt Priority Control 10) ......................... 124
IPC11 (Interrupt Priority Control 11) ......................... 125
IPC12 (Interrupt Priority Control 12) ......................... 126
IPC13 (Interrupt Priority Control 13) ......................... 127
IPC14 (Interrupt Priority Control 14) ......................... 128
IPC15 (Interrupt Priority Control 15) ......................... 129
IPC16 (Interrupt Priority Control 16) ......................... 130
IPC17 (Interrupt Priority Control 17) ......................... 131
IPC2 (Interrupt Priority Control 2) ............................. 116
IPC3 (Interrupt Priority Control 3) ............................. 117
IPC4 (Interrupt Priority Control 4) ............................. 118
IPC5 (Interrupt Priority Control 5) ............................. 119
IPC6 (Interrupt Priority Control 6) ............................. 120
IPC7 (Interrupt Priority Control 7) ............................. 121
IPC8 (Interrupt Priority Control 8) ............................. 122
Standard Identifier) ........................................... 235
Mask n Extended Identifier).............................. 238
Standard Identifier) ........................................... 238
Address Offset A) ............................................. 139
Address Offset B) ............................................. 139
DS70594C-page 355

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