TDGL007 Microchip Technology, TDGL007 Datasheet - Page 64

• Manufacturer Part Number: TDGL007
• Description: Development Boards & Kits - PIC / DSPIC DIGILENT CEREBOT MC7 MOTOR CONTROL BRD
• Manufacturer: Microchip Technology

Specifications of TDGL007

• Product: Development Boards
• Interface Type: CAN, I2C
• Operating Supply Voltage: 5 V

TABLE 4-32:
TABLE 4-33:
TABLE 4-34:
TABLE 4-35:
RCON
OSCCON
CLKDIV
PLLFBD
OSCTUN
Legend:
Note
NVMCON
NVMKEY
Legend:
Note
PMD1
PMD2
PMD3
Legend:
File Name
File Name
TRISG
PORTG
LATG
ODCG
Legend:
Note
File Name
File Name
1:
2:
1:
1:
Addr
0740
0742
0744
0746
0748
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
RCON register Reset values dependent on type of Reset.
OSCCON register Reset values dependent on the FOSC Configuration bits and type of Reset.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Reset value shown is for POR only. Value on other Reset states is dependent on the state of memory write or erase operations at the time of Reset.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal for high pin count devices.
Addr
02E4
02E6
02E8
06E4
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal for high pin count devices.
The actual set of I/O port pins varies from one device to another. Please refer to the corresponding pinout diagrams.
Addr
Addr
0760
0766
0770
0772
0774
PORTG REGISTER MAP
SYSTEM CONTROL REGISTER MAP
NVM REGISTER MAP
PMD REGISTER MAP
TRISG15
ODCG15
TRAPR
LATG15
Bit 15
IC8MD
Bit 15
Bit 15
T5MD
T9MD
RG15
ROI
Bit 15
—
—
—
WR
—
IOPUWR
IC7MD
Bit 14
Bit 14
T4MD
T8MD
TRISG14
ODCG14
WREN
LATG14
Bit 14
Bit 14
—
—
RG14
—
COSC<2:0>
DOZE<2:0>
IC6MD
Bit 13
T3MD
T7MD
Bit 13
WRERR
Bit 13
TRISG13
ODCG13
—
—
—
LATG13
Bit 13
RG13
—
IC5MD
Bit 12
T2MD
T6MD
Bit 12
—
—
—
Bit 12
(1)
TRISG12
ODCG12
LATG12
—
—
Bit 12
RG12
IC4MD
DOZEN
Bit 11
T1MD
Bit 11
—
—
—
—
—
Bit 11
—
—
Bit 11
—
—
—
—
QEI1MD
IC3MD
Bit 10
Bit 10
—
—
—
—
Bit 10
Bit 10
—
—
—
—
—
—
FRCDIV<2:0>
NOSC<2:0>
PWMMD
IC2MD
Bit 9
Bit 9
—
—
—
—
TRISG9
ODCG9
LATG9
Bit 9
Bit 9
RG9
—
—
VREGS
IC1MD
Bit 8
Bit 8
—
—
—
TRISG8
ODCG8
LATG8
Bit 8
Bit 8
RG8
—
—
CLKLOCK
I2C1MD
OC8MD
EXTR
Bit 7
PLLPOST<1:0>
Bit 7
—
TRISG7
ODCG7
—
LATG7
Bit 7
RG7
Bit 7
—
OC7MD
Bit 6
SWR
U2MD
TRISG6
ODCG6
Bit 6
LATG6
—
—
ERASE
Bit 6
—
RG6
Bit 6
SWDTEN
LOCK
OC6MD
Bit 5
U1MD
Bit 5
—
Bit 5
—
Bit 5
—
—
—
—
—
PLLDIV<8:0>
WDTO
SPI2MD
OC5MD
Bit 4
Bit 4
—
Bit 4
—
—
—
—
Bit 4
—
NVMKEY<7:0>
—
SLEEP
TRISG3
ODCG3
SPI1MD
LATG3
Bit 3
OC4MD
Bit 3
CF
RG3
Bit 3
Bit 3
—
TUN<5:0>
PLLPRE<4::0>
TRISG2
ODCG2
LATG2
Bit 2
OC3MD
IDLE
C2MD
Bit 2
RG2
—
Bit 2
Bit 2
—
NVMOP<3:0>
LPOSCEN
TRISG1
ODCG1
LATG1
OC2MD
I2C2MD
Bit 1
RG1
Bit 1
BOR
C1MD
Bit 1
Bit 1
TRISG0
ODCG0
LATG0
OSWEN
Bit 0
OC1MD
RG0
AD1MD
AD2MD
Bit 0
POR
Bit 0
Bit 0
Resets
Resets
F3CF
xxxx
xxxx
0000
Resets
Resets
xxxx
0300
3040
0030
0000
0000
0000
All
0000
0000
0000
All
All
All
(1)
(2)
(1)