TDGL007 Microchip Technology, TDGL007 Datasheet - Page 262

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TDGL007

Manufacturer Part Number
TDGL007
Description
Development Boards & Kits - PIC / DSPIC DIGILENT CEREBOT MC7 MOTOR CONTROL BRD
Manufacturer
Microchip Technology
Datasheet

Specifications of TDGL007

Product
Development Boards
Interface Type
CAN, I2C
Operating Supply Voltage
5 V
dsPIC33FJXXXMCX06A/X08A/X10A
23.2
All of the dsPIC33FJXXXMCX06A/X08A/X10A devices
power their core digital logic at a nominal 2.5V. This
may create an issue for designs that are required to
operate at a higher typical voltage, such as 3.3V. To
simplify
dsPIC33FJXXXMCX06A/X08A/X10A
porate an on-chip regulator that allows the device to
run its core logic from V
The regulator provides power to the core from the other
V
than 5 ohms) capacitor (such as tantalum or ceramic)
be connected to the V
to maintain the stability of the regulator. The recom-
mended value for the filter capacitor is provided in
Table 26-13
On a POR
voltage regulator to generate an output voltage. During
this time, designated as T
disabled. T
resumes operation after any power-down.
FIGURE 23-1:
DS70594C-page 262
DD
Note 1:
Note:
pins. The regulator requires that a low-ESR (less
2:
On-Chip Voltage Regulator
C
,
system
EFC
STARTUP
it takes approximately 20 μs for the on-chip
It is important for the low-ESR capacitor to
be placed as close as possible to the V
pin.
of
These are typical operating voltages. Refer to
TABLE 26-13: “Internal Voltage Regulator
Specifications”
Characteristics”
of V
It is important for the low-ESR capacitor to
be placed as close as possible to the V
pin.
3.3V
Section 26.1 “DC
DD
and V
design,
is applied every time the device
CAP
CONNECTIONS FOR THE
ON-CHIP VOLTAGE
REGULATOR
V
V
V
DD
CAP
DD
CAP
SS
pin
dsPIC33F
.
STARTUP
located in
.
/
for the full operating ranges
(2)
(Figure
all
Characteristics”.
, code execution is
devices
Section 26.1 “DC
23-1). This helps
(1)
family
in
CAP
incor-
CAP
the
23.3
The BOR (Brown-out Reset) module is based on an
internal voltage reference circuit that monitors the
regulated supply voltage, V
the BOR module is to generate a device Reset when a
brown-out condition occurs. Brown-out conditions are
generally caused by glitches on the AC mains (i.e.,
missing portions of the AC cycle waveform due to bad
power transmission lines or voltage sags due to
excessive current draw when a large inductive load is
turned on).
A BOR will generate a Reset pulse which will reset the
device. The BOR will select the clock source, based on
the device Configuration bit values (FNOSC<2:0> and
POSCMD<1:0>). Furthermore, if an oscillator mode is
selected, the BOR will activate the Oscillator Start-up
Timer (OST). The system clock is held until OST
expires. If the PLL is used, then the clock will be held
until the LOCK bit (OSCCON<5>) is ‘1’.
Concurrently, the PWRT time-out (T
applied before the internal Reset is released. If
T
nominal delay of T
delay in this case is T
The BOR Status bit (RCON<1>) will be set to indicate
that a BOR has occurred. The BOR circuit continues to
operate while in Sleep or Idle modes and will reset the
device should V
voltage.
PWRT
= 0 and a crystal oscillator is being used, then a
BOR: Brown-out Reset
DD
FSCM
FSCM
fall below the BOR threshold
© 2011 Microchip Technology Inc.
= 100 is applied. The total
.
CAP
. The main purpose of
PWRT
) will be

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