N25Q128A13BSF40F NUMONYX, N25Q128A13BSF40F Datasheet - Page 27
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N25Q128A13BSF40F
Manufacturer Part Number
N25Q128A13BSF40F
Description
IC SRL FLASH 128MB NMX 16-SOIC
Manufacturer
NUMONYX
Series
Forté™r
Datasheet
1.N25Q128A13B1240F.pdf
(157 pages)
Specifications of N25Q128A13BSF40F
Format - Memory
FLASH
Memory Type
FLASH
Memory Size
128M (16M x 8)
Speed
108MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
N25Q128A13BSF40F
Manufacturer:
MICRON
Quantity:
15 000
Part Number:
N25Q128A13BSF40F
Manufacturer:
MICRON
Quantity:
20 000
N25Q128 - 3 V
5.2.3
5.2.4
5.2.5
5.2.6
5.2.7
Page programming
Programming the memory by transmitting the instruction, addresses and the output data on
2 data lines can be achieved in DIO-SPI protocol by using the Dual Command Page
Program instruction, that has 3 instruction codes (D2h, A2h and 02h) to help port from
Extended SPI protocol to DIO-SPI protocol
Quad and single input Program instructions are not available in DIO-SPI mode.
The DIO-SPI protocol is similar to the Extended SPI protocol i.e., to program one data byte
two instructions are required:
This is followed by the internal Program cycle (of duration tPP).
To spread this overhead, the Dual Command Page Program (DCPP) instruction allows up to
256 bytes to be programmed at a time (changing bits from 1 to 0), provided that they are
consecutive addresses on the same page of memory.
For optimized timings, it is recommended to use the DCPP instruction to program all
consecutive targeted bytes in a single sequence versus using several DCPP sequences
with each containing only a few bytes. See
Subsector Erase, Sector Erase and Bulk Erase
Similar to the Extended SPI protocol, in the DIO-SPI protocol to erase the memory bytes to
all 1s (FFh) the Subsector Erase (SSE), the Sector Erase (SE) and the Bulk Erase (BE)
instructions are available. These instructions start an internal Erase cycle (of duration tSSE,
tSE or tBE).
The Erase instruction must be preceded by a Write Enable (WREN) instruction.
Polling during a Write, Program or Erase cycle
Similar to the Extended SPI protocol, in the DIO-SPI protocol it is possible to monitor if the
internal write, program or erase operation is completed, by polling the dedicated register bits
by using the Read Status Register (RDSR) or Read Flag Status Register (RFSR)
instructions, the only obvious difference is that instruction codes, addresses and output data
are transmitted across two data lines.
Read and Modify registers
Similar to the Extended SPI protocol, the only obvious difference is that instruction codes,
addresses and output data are transmitted across two data lines
Active Power and Standby Power modes
Similar to the Extended SPI protocol, when Chip Select (S) is Low, the device is selected,
and in the Active Power mode. When Chip Select (S) is High, the device is deselected, but
could remain in the Active Power mode until all internal cycles have completed (Program,
Erase, Write Cycles). The device then goes in to the Standby Power mode. The device
consumption drops to ICC1.
Write Enable (WREN), which is one byte, and a
Dual Command Page Program (DCPP) sequence, which consists of four bytes plus
data.
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Table 36.: AC
Characteristics.
©2010 Micron Technology, Inc. All rights reserved.
Operating features
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