PSD835G2-90U STMicroelectronics, PSD835G2-90U Datasheet - Page 33

• Manufacturer Part Number: PSD835G2-90U
• Description: IC FLASH 4MBIT 90NS 80TQFP
• Manufacturer: STMicroelectronics

Specifications of PSD835G2-90U

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 4M (512K x 8)
• Speed: 90ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 80-TQFP, 80-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-2015

PSD835G2
6.2
6.3
6.4
Note:
Primary Flash memory and secondary Flash memory
description
The primary Flash memory is divided evenly into eight equal sectors. The secondary Flash
memory is divided into four equal sectors of eight Kbytes each. Each sector of either
memory block can be separately protected from program and erase cycles.
Flash memory may be erased on a sector-by-sector basis and programmed word-by-word.
Flash sector erasure may be suspended while data is read from other sectors of the block
and then resumed after reading.
During a program or erase cycle in Flash memory, the status can be output on Ready/Busy
(PE4). This pin is set up using PSDsoft.
Memory Block Select signals
The DPLD generates the Select signals for all the internal memory blocks (see
PLDs). Each of the eight sectors of the primary Flash memory has a Select signal (FS0-
FS7) which can contain up to three product terms. Each of the four sectors of the secondary
Flash memory has a Select signal (CSBOOT0-CSBOOT3) which can contain up to three
product terms. Having three product terms for each Select signal allows a given sector to be
mapped in different areas of system memory. When using an MCU with separate program
and data space, these flexible Select signals allow dynamic re-mapping of sectors from one
memory space to the other before and after IAP.
Upper and lower block in main Flash sector
The PSD835G2’s main Flash memory has eight 64-Kbyte sectors. The 64-Kbyte sector size
may cause some difficulty in code mapping for an 8-bit MCU with only 64-Kbyte address
space. To resolve this mapping issue, the PSD835G2 provides additional logic (see
Figure
Kbyte block, and the two blocks can reside in different pages but in the same address range.
If your design works with 64KB sectors, you don’t need to configure this logic. If the design
requires 32KB blocks in each sector, you need to define a “FA15” PLD equation in PSDsoft
as the A15 address input to the main Flash module. FA15 consists of 3 product terms and
will control whether the MCU is accessing the lower or upper 32KB in the selected sector.
Figure 4 shows an example for Flash sector chip select FS0. A typical equation is FA15 =
pgr4 of the Page register. When pgr4 is 0 (page 00), the lower 32KB is selected. When pgr4
is switched to ’1’ by the user, the upper 32KB is selected. PSDsoft will automatically
generate the PLD equations shown, based on your point and click selections.
If no FA15 equation is defined in PSDsoft, the A15 that comes from the MCU address bus
will be routed as input to the primary Flash memory instead of FA15. The FA15 equation has
no impact on the Sector Erase operation.
FA15 affects all eight sectors of the primary Flash memory simultaneously. You cannot
direct FA15 to a particular Flash sector only.
5) for the user to split the 8 sectors such that each sector has a lower and upper 32-
Detailed operation
Section 15:
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