PSD835G2-90U STMicroelectronics, PSD835G2-90U Datasheet - Page 84
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PSD835G2-90U
Manufacturer Part Number
PSD835G2-90U
Description
IC FLASH 4MBIT 90NS 80TQFP
Manufacturer
STMicroelectronics
Datasheet
1.PSD835G2-90U.pdf
(120 pages)
Specifications of PSD835G2-90U
Format - Memory
FLASH
Memory Type
FLASH
Memory Size
4M (512K x 8)
Speed
90ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-2015
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PSD835G2-90U
Manufacturer:
TRIQUINT
Quantity:
22
Company:
Part Number:
PSD835G2-90U
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
PSD835G2-90U
Manufacturer:
ST
Quantity:
20 000
Company:
Part Number:
PSD835G2-90UI
Manufacturer:
ST
Quantity:
201
Company:
Part Number:
PSD835G2-90UI
Manufacturer:
STMicroelectronics
Quantity:
10 000
I/O ports
Figure 27. Port A, B and C structure
84/120
The two ports can be configured to perform one or more of the following functions:
●
●
●
●
●
MCELLA7-MCELLA0 (PORT A)
MCELLB7-MCELLB0 (PORT B)
EXT.CS (PORT C)
ENABLE PRODUCT TERM ( .OE )
WR
WR
MCU I/O mode
CPLD Output – macrocells McellA7-McellA0 can be connected to port A, McellB7-
McellB0 can be connected to port B, External Chip Select ECS7-ECS0 can be
connected to port C.
CPLD Input – Via the input macrocells (IMC).
Address In – Additional high address inputs using the input macrocells (IMC).
Open Drain/Slew Rate – pins PC7-PC0 can be configured to fast slew rate, pins PA7-
PA0 and PB7-PB0 can be configured to Open Drain mode.
CPLD-INPUT
DATA OUT
READ MUX
DIR REG.
D
D
REG.
P
D
B
Q
Q
DATA OUT
DATA IN
OUTPUT
SELECT
OUTPUT
MUX
ENABLE OUT
MACROCELL
INPUT
PSD835G2
PORT PIN
AI02887b