PSD835G2-90U STMicroelectronics, PSD835G2-90U Datasheet - Page 45

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PSD835G2-90U

Manufacturer Part Number
PSD835G2-90U
Description
IC FLASH 4MBIT 90NS 80TQFP
Manufacturer
STMicroelectronics
Datasheet

Specifications of PSD835G2-90U

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
4M (512K x 8)
Speed
90ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-2015

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0
PSD835G2
9.4
Suspend Sector Erase instruction executed during an Erase time-out period, in addition to
suspending the Erase cycle, terminates the time out period.
The Toggle flag bit (DQ6) stops toggling when the PSD internal logic is suspended. The
status of this bit must be monitored at an address within the Flash memory sector being
erased. The Toggle flag bit (DQ6) stops toggling between 0.1 µs and 15 µs after the
Suspend Sector Erase instruction has been executed. The PSD is then automatically set to
READ mode.
If a Suspend Sector Erase instruction was executed, the following rules apply:
Resume Sector Erase
If a Suspend Sector Erase instruction was previously executed, the erase cycle may be
resumed with this instruction. The Resume Sector Erase instruction consists in writing 030h
to any even address while an appropriate Sector Select (FS0-FS7 or CSBOOT0-CSBOOT3)
is high (see
Attempting to read from a Flash memory sector that was being erased outputs invalid
data.
Reading from a Flash sector that was not being erased is valid.
The Flash memory cannot be programmed, and only responds to Resume Sector
Erase and Reset Flash instructions (READ is an operation and is allowed).
If a Reset Flash instruction is received, data in the Flash memory sector that was being
erased is invalid.
Table
7.)
Erasing Flash memory
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