PSD835G2-90U STMicroelectronics, PSD835G2-90U Datasheet - Page 42

• Manufacturer Part Number: PSD835G2-90U
• Description: IC FLASH 4MBIT 90NS 80TQFP
• Manufacturer: STMicroelectronics

Specifications of PSD835G2-90U

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 4M (512K x 8)
• Speed: 90ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 80-TQFP, 80-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-2015

Programming Flash memory
8.2
42/120
Figure 6.
Data Toggle
Checking the Toggle flag bit (DQ6) is a method of determining whether a Program or Erase
cycle is in progress or has completed.
When the MCU issues a Program instruction, the embedded algorithm within the PSD
begins. The MCU then reads the location of the byte to be programmed in Flash memory to
check status. The Toggle flag bit (DQ6) of this location toggles each time the MCU reads
this location until the embedded algorithm is complete. The MCU continues to read this
location, checking the Toggle flag bit (DQ6) and monitoring the Error flag bit (DQ5). When
the Toggle flag bit (DQ6) stops toggling (two consecutive READs yield the same value), and
the Error flag bit (DQ5) remains '0,' the embedded algorithm is complete. If the Error flag bit
(DQ5) is 1,' the MCU should test the Toggle flag bit (DQ6) again, since the Toggle flag bit
(DQ6) may have changed simultaneously with the Error flag bit (DQ5, see
The Error flag bit (DQ5) is set if either an internal time-out occurred while the embedded
algorithm attempted to program the byte, or if the MCU attempted to program a ’1’ to a bit
that was not erased (not erased is logic 0).
It is suggested (as with all Flash memories) to read the location again after the embedded
programming algorithm has completed, to compare the byte that was written to Flash
memory with the byte that was intended to be written.
When using the Data Toggle method after an Erase cycle,
flag bit (DQ6) toggles until the Erase cycle is complete. A 1 on the Error flag bit (DQ5)
Data Polling flowchart
at VALID ADDRESS
NO
READ DQ5 & DQ7
Figure 7
READ DQ7
START
DATA
DATA
FAIL
DQ7
DQ5
DQ7
= 1
=
=
YES
NO
NO
shows the Data Toggle algorithm.
YES
YES
PASS
Figure 7
AI01369B
still applies. the Toggle
Figure
PSD835G2
7).