PSD835G2-90U STMicroelectronics, PSD835G2-90U Datasheet - Page 89

• Manufacturer Part Number: PSD835G2-90U
• Description: IC FLASH 4MBIT 90NS 80TQFP
• Manufacturer: STMicroelectronics

Specifications of PSD835G2-90U

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 4M (512K x 8)
• Speed: 90ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 80-TQFP, 80-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-2015

PSD835G2
18.1
18.1.1
Automatic Power-down (APD) unit and Power-down mode
The APD Unit, shown in
activity of Address Strobe (ALE/AS, PD0). If the APD Unit is enabled, as soon as activity on
Address Strobe (ALE/AS, PD0) stops, a four-bit counter starts counting. If Address Strobe
(ALE/AS, PD0) remains inactive for fifteen clock periods of CLKIN (PD1), Power-down
(PDN) goes high, and the PSD enters Power-down mode, as discussed next.
Power-down mode
By default, if you enable the APD Unit, Power-down mode is automatically enabled. The
device enters Power-down mode if Address Strobe (ALE/AS, PD0) remains inactive for
fifteen periods of CLKIN (PD1).
The following should be kept in mind when the PSD is in Power-down mode:
●
●
●
●
●
Table 23.
If Address Strobe (ALE/AS, PD0) starts pulsing again, the PSD returns to normal
Operating mode. The PSD also returns to normal Operating mode if either PSD Chip
Select Input (CSI, PD2) is low or the Reset (RESET) input is high.
The MCU address/data bus is blocked from all memories and PLDs.
Various signals can be blocked (prior to Power-down mode) from entering the PLDs by
setting the appropriate bits in the PMMR registers. The blocked signals include MCU
control signals and the common CLKIN (PD1). Note that blocking CLKIN (PD1) from
the PLDs does not block CLKIN (PD1) from the APD Unit.
All PSD memories enter Standby mode and are drawing standby current. However, the
PLD and I/O ports blocks do not go into Standby mode because you don’t want to have
to wait for the logic and I/O to “wake-up” before their outputs can change. See
for Power-down mode effects on PSD ports.
Typical standby current is of the order of microamperes. These standby current values
assume that there are no transitions on any PLD input.
Power-down mode effect on ports
Port function
Peripheral I/O
Address Out
Data port
MCU I/O
PLD Out
Figure
30, puts the PSD into Power-down mode by monitoring the
No change
No change
Undefined
Pin level
Tri-State
Tri-State
Power management
Table 23
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