PSD835G2-90U STMicroelectronics, PSD835G2-90U Datasheet - Page 56
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PSD835G2-90U
Manufacturer Part Number
PSD835G2-90U
Description
IC FLASH 4MBIT 90NS 80TQFP
Manufacturer
STMicroelectronics
Datasheet
1.PSD835G2-90U.pdf
(120 pages)
Specifications of PSD835G2-90U
Format - Memory
FLASH
Memory Type
FLASH
Memory Size
4M (512K x 8)
Speed
90ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-2015
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PSD835G2-90U
Manufacturer:
TRIQUINT
Quantity:
22
Company:
Part Number:
PSD835G2-90U
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
PSD835G2-90U
Manufacturer:
ST
Quantity:
20 000
Company:
Part Number:
PSD835G2-90UI
Manufacturer:
ST
Quantity:
201
Company:
Part Number:
PSD835G2-90UI
Manufacturer:
STMicroelectronics
Quantity:
10 000
PLDs
15.2
Figure 13. DPLD logic array
1. The address inputs are A19-A4 in 80C51XA mode.
2. Additional address lines can be brought into PSD via port A, B, C, D or F.
56/120
I /O PORTS (PORT A,B,C,F)
MCELLA.FB7-FB0 (FEEDBACKS)
MCELLB.FB7-FB0 (FEEDBACKS)
PGR0 - PGR7
A15-A0
PD3-PD0 (ALE,CLKIN,CSI)
PDN (APD OUTPUT)
CNTRL2-CNTRL0 ( READ/WRITE CONTROL SIGNALS)
RESET
RD_BSY
(1,2)
Decode PLD (DPLD)
The DPLD, shown in
components. The DPLD can be used to generate the following decode signals:
●
●
●
●
●
●
8 Sector Select (FS0-FS7) signals for the primary Flash memory (three product terms
each)
4 Sector Select (CSBOOT0-CSBOOT3) signals for the secondary Flash memory (three
product terms each)
1 internal SRAM Select (RS0) signal (three product terms)
1 internal CSIOP Select (PSD Configuration register) signal
1 JTAG Select signal (enables JTAG/ISP on port E)
2 internal Peripheral Select signals
(Peripheral I/O mode).
Figure
(INPUTS)
(32)
(16)
13, is used for decoding the address for internal and external
(8)
(8)
(8)
(4)
(3)
(1)
(1)
(1)
3
3
3
3
3
3
3
3
3
3
3
3
3
RS0
CSIOP
PSEL0
PSEL1
JTAGSEL
CSBOOT 0
CSBOOT 1
CSBOOT 2
CSBOOT 3
FS0
FS1
FS7
FS2
FS3
FS5
FS6
FS4
8 PRIMARY FLASH
MEMORY SECTOR
SELECTS
PERIPHERAL I/O
MODE SELECT
SRAM SELECT
I/O DECODER
SELECT
PSD835G2
AI02873E