XCF128XFTG64C Xilinx Inc, XCF128XFTG64C Datasheet - Page 16

IC PROM SRL 128M GATE 64-FTBGA

XCF128XFTG64C

Manufacturer Part Number
XCF128XFTG64C
Description
IC PROM SRL 128M GATE 64-FTBGA
Manufacturer
Xilinx Inc
Datasheet

Specifications of XCF128XFTG64C

Memory Size
128Mb
Programmable Type
In System Programmable
Voltage - Supply
1.7 V ~ 2 V
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TBGA
Access Time
85ns
Supply Voltage Range
1.7V To 2V
Memory Case Style
FTBGA
No. Of Pins
64
Operating Temperature Range
-40°C To +85°C
Svhc
No SVHC (15-Dec-2010)
Package /
RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1578

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The Program/Erase Resume command is required to
restart the suspended operation. One Bus Write cycle is
required to issue the Program/Erase Suspend command.
After the Program/Erase Controller pauses, bits SR7, SR6
and/or SR2 of the Status Register are set to ‘1’.
The following commands are accepted during
Program/Erase Suspend:
Additionally, if the suspended operation is a Block Erase,
then the following commands are also accepted:
During an erase suspend, the block being erased can be
protected by issuing Block Lock or Block Lock-Down
commands. When the Program/Erase Resume command is
issued, the operation completes.
It is possible to accumulate multiple suspend operations.
For example, suspend an erase operation, start a
program operation, suspend the program operation, then
read the array.
If a Program command is issued during a Block Erase
Suspend, the erase operation cannot be resumed until the
program operation is complete.
The Program/Erase Suspend command does not change
the read mode of the banks. If the suspended bank is in
Read Status Register, Read Electronic Signature or Read
CFI Query mode, the bank remains in that mode and
outputs the corresponding data.
Refer to
page 35
operations allowed during Program/Erase Suspend.
During a Program/Erase Suspend, the device can be
placed in standby mode by taking Chip Enable to V
Program/erase is aborted if Reset (RP) goes to V
See
flowcharts for using the Program/Erase Suspend command.
DS617 (v3.0.1) January 07, 2010
Product Specification
Program/Erase Resume
Read Array (data from erase-suspended block or
program-suspended word is not valid)
Read Status Register
Read Electronic Signature
Read CFI Query
Clear Status Register
Program (except in erase-suspended block)
Buffer Program (except in erase suspended blocks)
Block Lock
Block Lock-Down
Block Unlock
Set Configuration Register
Figure 40, page
"Dual Operations and Multiple Bank Architecture,"
for detailed information about simultaneous
R
74, and
Figure 42, page
76, for
IL
.
IH
Platform Flash XL High-Density Configuration and Storage Device
.
www.xilinx.com
Program/Erase Resume Command
The Program/Erase Resume command is used to restart the
program or erase operation suspended by the Program/Erase
Suspend command. One Bus Write cycle is required to issue
the command and can be issued to any address.
The Program/Erase Resume command does not change
the read mode of the banks. If the suspended bank is in
Read Status Register, Read Electronic Signature or Read
CFI Query mode, the bank remains in that mode and
outputs the corresponding data.
If a Program command is issued during a Block Erase
Suspend, then the erase cannot be resumed until the
program operation is complete.
See
flowcharts for using the Program/Erase Resume command.
Protection Register Program Command
The Protection Register Program command is used to
program the user one-time-programmable (OTP) segments of
the Protection Register and the two Protection Register Locks.
The device features 16 OTP segments of 128 bits and one
OTP segment of 64 bits
are programmed one word at a time. When shipped, all bits
in the segment are set to ‘1’. The user can only program the
bits to ‘0’.
Two Bus Write cycles are required to issue the Protection
Register Program command:
Read operations to the bank being programmed output the
Status Register content after the program operation starts.
Attempting to program a previously protected Protection
Register results in a Status Register error.
The Protection Register Program cannot be suspended.
Dual operations between the Parameter Bank and the
Protection Register memory space are not allowed (see
Table 17, page
The two Protection Register Locks are used to protect the
OTP segments from further modification. The protection of
the OTP segments is not reversible. Refer to
page
See
Protection Register Program command.
Set Configuration Register Command
The Set Configuration Register command is used to write a
new value to the Configuration Register. Two Bus Write cycles
are required to issue the Set Configuration Register command:
The first bus cycle sets up the Protection Register
Program command.
The second latches the address and data to be
programmed to the Protection Register and starts the
Program/Erase Controller.
Figure 40, page
Figure 44, page
22, and
Table 10, page
36, for details).
74, and
78, for a flowchart for using the
(Figure 8, page
22, for details on the Lock bits.
Figure 42, page
22). The segments
Figure 8,
76, for
16

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